公开(公告)号：US20220406911A1

公开(公告)日：2022-12-22

申请号：US17545373

申请日：2021-12-08

Applicant: Samsung Electronics Co., Ltd.

Inventor： Minseok YOO ,  Minsu SEOL ,  Junyoung KWON ,  Kyung-Eun BYUN ,  Hyeonjin SHIN ,  Van Luan NGUYEN

IPC: H01L29/423 ,  H01L29/43

Abstract: Disclosed are an electronic device including a two-dimensional material, and a method of fabricating the electronic device. The electronic device may include a first metal layer including a transition metal, a second metal layer on the first metal layer and including gold (Au), and a two-dimensional material layer between the first metal layer and the second metal layer. The two-dimensional material layer may include a transition metal dichalcogenide (TMD). The two-dimensional material layer may be formed as a chalcogen element diffuses into the second metal layer and reacts with the transition metal of the first metal layer adjacent to the second metal layer.

公开(公告)号：US20210305378A1

公开(公告)日：2021-09-30

申请号：US17014127

申请日：2020-09-08

Applicant: Samsung Electronics Co., Ltd.

Inventor： Minsu SEOL ,  Hyeonjin SHIN ,  Minseok YOO ,  Minhyun LEE

IPC: H01L29/41 ,  H01L29/417 ,  H01L29/24 ,  H01L29/06 ,  H01L29/45 ,  H01L29/786 ,  H01L29/66

Abstract: Provided are two-dimensional material (2D)-based wiring conductive layer contact structures, electronic devices including the same, and methods of manufacturing the electronic devices. A 2D material-based field effect transistor includes a substrate; first to third 2D material layers on the substrate; an insulating layer on the first 2D material layer; a source electrode on the second 2D material layer; a drain electrode on the third 2D material layer; and a gate electrode on the insulating layer. The first 2D material layer is configured to exhibit semiconductor characteristics, and the second and third 2D material layers are metallic 2D material layers. The first 2D material layer may include a first channel layer of a 2D material and a second channel layer of a 2D material. The first 2D material layer may partially overlap the second and third 2D material layers.

公开(公告)号：US20250107191A1

公开(公告)日：2025-03-27

申请号：US18897189

申请日：2024-09-26

Applicant: Samsung Electronics Co., Ltd. ,  KOREA ADVANCED INSTITUTE OF SCIENCE AND TECHNOLOGY

Inventor： Minseok YOO ,  Kibum KANG ,  Minseung GYEON ,  Minsu SEOL

IPC: H01L29/24 ,  H01L29/08 ,  H01L29/10 ,  H01L29/66 ,  H01L29/786

Abstract: A semiconductor device may include a channel layer including a channel region, a source region, and a drain region, the source region and the drain region being on both sides of the channel region, respectively; a source electrode connected to the source region, a drain electrode connected to the drain region, and a gate electrode on the channel region. The channel region may include a first two-dimensional material layer including a noble metal-based two-dimensional semiconductor material and a second two-dimensional material layer including a two-dimensional semiconductor material different from the first two-dimensional material layer.

公开(公告)号：US20250028017A1

公开(公告)日：2025-01-23

申请号：US18742281

申请日：2024-06-13

Applicant: Samsung Electronics Co., Ltd. ,  INCHEON NATIONAL UNIVERSITY RESEARCH & BUSINESS FOUNDATION

Inventor： Chul Joon HEO ,  Hyunchae CHUN ,  Minseok YOO ,  Kyung Bae PARK ,  Younhee LIM

IPC: G01S5/16

Abstract: A method and a device for estimating a position of a device by using an optical signal through converting a linearly polarized optical signal to a plurality of electric signals using a plurality of photoelectric devices, estimating a moving distance of the device from a reference position by using the plurality of electric signals, and estimating an orientation angle of the device with respect to a reference direction by using the plurality of electric signals are provided.

公开(公告)号：US20240186183A1

公开(公告)日：2024-06-06

申请号：US18441520

申请日：2024-02-14

Applicant: Samsung Electronics Co., Ltd.

Inventor： Minsu SEOL ,  Minhyun LEE ,  Junyoung KWON ,  Hyeonjin SHIN ,  Minseok YOO

IPC: H01L21/8234 ,  H01L21/02 ,  H01L29/06 ,  H01L29/16 ,  H01L29/24 ,  H01L29/423 ,  H01L29/66 ,  H01L29/76 ,  H01L29/786

CPC classification number: H01L21/823412 ,  H01L21/02521 ,  H01L21/02527 ,  H01L21/02568 ,  H01L21/0259 ,  H01L21/823431 ,  H01L29/0665 ,  H01L29/1606 ,  H01L29/24 ,  H01L29/42392 ,  H01L29/66045 ,  H01L29/66969 ,  H01L29/7606 ,  H01L29/78696

Abstract: Disclosed are a field effect transistor and a method of manufacturing the same. The field effect transistor includes a source electrode on a substrate, a drain electrode separated from the source electrode, and channels connected between the source electrode and the drain electrode, gate insulating layers, and a gate electrode. The channels may have a hollow closed cross-sectional structure when viewed in a first cross-section formed by a plane across the source electrode and the drain electrode in a direction perpendicular to the substrate. The gate insulating layers may be in the channels. The gate electrode may be insulated from the source electrode and the drain electrode by the gate insulating layers.

公开(公告)号：US20240038845A1

公开(公告)日：2024-02-01

申请号：US18335487

申请日：2023-06-15

Applicant: Samsung Electronics Co., Ltd.

Inventor： Minseok YOO ,  Minsu SEOL ,  Junyoung KWON ,  Kyung-Eun BYUN

IPC: H01L29/10 ,  H01L29/778 ,  H01L29/78 ,  H01L29/66 ,  H01L29/417

CPC classification number: H01L29/1033 ,  H01L29/7786 ,  H01L29/785 ,  H01L29/66795 ,  H01L29/66431 ,  H01L29/41791

Abstract: A layer structure including a two-dimensional (2D) channel layer, a method of manufacturing a two-dimensional (2D) channel layer, an electronic device including the layer structure, and an electronic apparatus including the layer structure are disclosed. The layer structure may include a first substrate, a second substrate surrounded by the first substrate, and a 2D channel layer on the second substrate. An interfacial energy of the second substrate may be less than an interfacial energy of the first substrate. The method of manufacturing a 2D channel layer may include forming a second substrate to be surrounded by a first substrate, forming a precursor layer for forming a 2D channel on any one of the first and second substrates, and transforming the precursor layer into a liquid precursor layer. The interfacial energy of the second substrate may be less than the interfacial energy of the first substrate.

公开(公告)号：US20230078018A1

公开(公告)日：2023-03-16

申请号：US17945534

申请日：2022-09-15

Applicant: Samsung Electronics Co., Ltd.

Inventor： Changseok LEE ,  Sangwon KIM ,  Kyung-Eun BYUN ,  Minseok YOO

IPC: H01L21/265 ,  H01L21/02 ,  C23C16/02 ,  C23C16/26

Abstract: Provided are a layer structure including a carbon-based material, a method of manufacturing the layer structure, an electronic device including the layer structure, and an electronic apparatus including the electronic device. The layer structure may include a lower layer, an ion implantation layer in the lower layer, and a carbon-based material layer on the ion implantation layer, wherein the ion implantation layer includes carbon. The ion implantation layer may include a trench, and the carbon-based material layer may be provided in the trench. The carbon-based material layer may be formed to coat an inner surface of the trench. The carbon-based material layer may fill at least a portion of the trench. The ion implantation concentration of the ion implantation layer may be uniform as a whole. The ion implantation layer may have an ion implantation concentration gradient in a given direction.

公开(公告)号：US20220238721A1

公开(公告)日：2022-07-28

申请号：US17505955

申请日：2021-10-20

Applicant: Samsung Electronics Co., Ltd.

Inventor： Van Luan NGUYEN ,  Minsu SEOL ,  Eunkyu LEE ,  Junyoung KWON ,  Hyeonjin SHIN ,  Minseok YOO

IPC: H01L29/786

Abstract: A semiconductor device according to an embodiment may include a substrate, an adhesive layer, and a semiconductor layer. The semiconductor layer includes a 2D material having a layered structure. The adhesive layer is interposed between the substrate and the semiconductor layer, and has adhesiveness to a 2D material.

公开(公告)号：US20220238692A1

公开(公告)日：2022-07-28

申请号：US17546303

申请日：2021-12-09

Applicant: Samsung Electronics Co., Ltd.

Inventor： Van Luan NGUYEN ,  Minsu SEOL ,  Junyoung KWON ,  Hyeonjin SHIN ,  Minseok YOO ,  Yeonchoo CHO

IPC: H01L29/66 ,  H01L21/02 ,  H01L21/304 ,  H01L21/463

Abstract: A method of patterning a 2D material layer is includes selectively forming a first material layer on a surface of a substrate to form a first region in which the first material layer covers the surface of the substrate and to further form a second region in which the surface of the substrate is exposed from the first material layer, the first material layer having a strong adhesive force with a 2D material. The method further includes forming a 2D material layer is formed in both the first region and the second region. The method further includes selectively removing the 2D material layer from the second region based on using a physical removal method, such that the 2D material layer remains in the first region.