公开(公告)号：US12261200B2

公开(公告)日：2025-03-25

申请号：US18488381

申请日：2023-10-17

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Min-Chul Sun ,  Dae Won Ha ,  Dong Hoon Hwang ,  Jong Hwa Baek ,  Jong Min Jeon ,  Seung Mo Ha ,  Kwang Yong Yang ,  Jae Young Park ,  Young Su Chung

IPC: H01L29/06 ,  H01L21/762 ,  H01L21/8234 ,  H01L27/088 ,  H01L29/417 ,  H10B10/00

Abstract: A semiconductor device including a device isolation region is provided. The semiconductor device includes first active regions disposed on a substrate, and an isolation region between the active regions. The isolation region includes a first portion formed of a first insulating material, and a second portion formed of a second insulating material, having different characteristics from those of the first insulating material. The first portion is closer to the first active regions than the second portion. The second portion has a bottom surface having a height different from that of a bottom surface of the first portion.

公开(公告)号：US11575002B2

公开(公告)日：2023-02-07

申请号：US17212847

申请日：2021-03-25

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Min-Chul Sun ,  Dae Won Ha ,  Dong Hoon Hwang ,  Jong Hwa Baek ,  Jong Min Jeon ,  Seung Mo Ha ,  Kwang Yong Yang ,  Jae Young Park ,  Young Su Chung

IPC: H01L29/06 ,  H01L27/088 ,  H01L21/8234 ,  H01L21/762 ,  H01L27/11 ,  H01L29/417

Abstract: A semiconductor device including a device isolation region is provided. The semiconductor device includes first active regions disposed on a substrate, and an isolation region between the active regions. The isolation region includes a first portion formed of a first insulating material, and a second portion formed of a second insulating material, having different characteristics from those of the first insulating material. The first portion is closer to the first active regions than the second portion. The second portion has a bottom surface having a height different from that of a bottom surface of the first portion.

公开(公告)号：US10109532B2

公开(公告)日：2018-10-23

申请号：US15658964

申请日：2017-07-25

Applicant: Samsung Electronics Co., Ltd.

Inventor： Min-Chul Sun ,  Myeong-Cheol Kim ,  Kyoung-Sub Shin

IPC: H01L21/8238 ,  H01L29/66 ,  H01L21/306 ,  H01L21/308 ,  H01L27/092 ,  H01L29/10 ,  H01L29/08 ,  H01L29/06 ,  H01L23/535 ,  G06F7/505 ,  G06F17/50

Abstract: In a method of manufacturing a semiconductor device, first to third active fins are formed on a substrate. Each of the first to third active fins extends in a first direction, and the second active fin, the first active fin, and the third active fin are disposed in this order in a second direction crossing the first direction. The second active fin is removed using a first etching mask covering the first and third active fins. The third active fin is removed using a second etching mask covering the first active fin and a portion of the substrate from which the second active fin is removed. A first gate structure is formed on the first active fin. A first source/drain layer is formed on a portion of the first active fin adjacent the first gate structure.

公开(公告)号：US12261087B2

公开(公告)日：2025-03-25

申请号：US18491470

申请日：2023-10-20

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Min-Chul Sun ,  Myeong-Cheol Kim ,  Kyoung-Sub Shin

IPC: H01L29/10 ,  G06F7/505 ,  G06F30/39 ,  G06F30/398 ,  H01L21/306 ,  H01L21/308 ,  H01L21/8234 ,  H01L21/8238 ,  H01L23/535 ,  H01L27/088 ,  H01L27/092 ,  H01L29/06 ,  H01L29/08 ,  H01L29/417 ,  H01L29/66 ,  G06F117/12 ,  G06F119/12

Abstract: In a method of manufacturing a semiconductor device, first to third active fins are formed on a substrate. Each of the first to third active fins extends in a first direction, and the second active fin, the first active fin, and the third active fin are disposed in this order in a second direction crossing the first direction. The second active fin is removed using a first etching mask covering the first and third active fins. The third active fin is removed using a second etching mask covering the first active fin and a portion of the substrate from which the second active fin is removed. A first gate structure is formed on the first active fin. A first source/drain layer is formed on a portion of the first active fin adjacent the first gate structure.

公开(公告)号：US20230178595A1

公开(公告)日：2023-06-08

申请号：US18162892

申请日：2023-02-01

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Min-Chul Sun ,  Dae Won Ha ,  Dong Hoon Hwang ,  Jong Hwa Baek ,  Jong Min Jeon ,  Seung Mo Ha ,  Kwang Yong Yang ,  Jae Young Park ,  Young Su Chung

IPC: H01L29/06 ,  H01L27/088 ,  H01L21/8234 ,  H01L21/762

CPC classification number: H01L29/0649 ,  H01L27/0886 ,  H01L21/823431 ,  H01L21/76224 ,  H01L21/823481 ,  H01L29/41791

Abstract: A semiconductor device including a device isolation region is provided. The semiconductor device includes first active regions disposed on a substrate, and an isolation region between the active regions. The isolation region includes a first portion formed of a first insulating material, and a second portion formed of a second insulating material, having different characteristics from those of the first insulating material. The first portion is closer to the first active regions than the second portion. The second portion has a bottom surface having a height different from that of a bottom surface of the first portion.

公开(公告)号：US10964782B2

公开(公告)日：2021-03-30

申请号：US16715075

申请日：2019-12-16

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Min-Chul Sun ,  Dae Won Ha ,  Dong Hoon Hwang ,  Jong Hwa Baek ,  Jong Min Jeon ,  Seung Mo Ha ,  Kwang Yong Yang ,  Jae Young Park ,  Young Su Chung

IPC: H01L29/06 ,  H01L27/088 ,  H01L21/8234 ,  H01L21/762 ,  H01L27/11 ,  H01L29/417

Abstract: A semiconductor device including a device isolation region is provided. The semiconductor device includes first active regions disposed on a substrate, and an isolation region between the active regions. The isolation region includes a first portion formed of a first insulating material, and a second portion formed of a second insulating material, having different characteristics from those of the first insulating material. The first portion is closer to the first active regions than the second portion. The second portion has a bottom surface having a height different from that of a bottom surface of the first portion.

公开(公告)号：US20190096993A1

公开(公告)日：2019-03-28

申请号：US15933827

申请日：2018-03-23

Applicant: Samsung Electronics Co., Ltd.

Inventor： Min-Chul Sun ,  Dae Won Ha ,  Dong Hoon Hwang ,  Jong Hwa Baek ,  Jong Min Jeon ,  Seung Mo Ha ,  Kwang Yong Yang ,  Jae Young Park ,  Young Su Chung

IPC: H01L29/06 ,  H01L27/088 ,  H01L21/8234 ,  H01L21/762

Abstract: A semiconductor device including a device isolation region is provided. The semiconductor device includes first active regions disposed on a substrate, and an isolation region between the active regions. The isolation region includes a first portion formed of a first insulating material, and a second portion formed of a second insulating material, having different characteristics from those of the first insulating material. The first portion is closer to the first active regions than the second portion. The second portion has a bottom surface having a height different from that of a bottom surface of the first portion.

公开(公告)号：US09219119B2

公开(公告)日：2015-12-22

申请号：US14048347

申请日：2013-10-08

Applicant: SAMSUNG ELECTRONICS CO., LTD. ,  Seoul National University R & DB Foundation

Inventor： Min-Chul Sun ,  Byung-Gook Park

IPC: H01L29/06 ,  H01L27/088 ,  H01L29/772 ,  H01L21/8234 ,  H01L29/423 ,  H01L29/786 ,  H01L27/12 ,  B82Y99/00

CPC classification number: H01L21/823412 ,  B82Y99/00 ,  H01L21/02532 ,  H01L21/02647 ,  H01L21/3065 ,  H01L27/088 ,  H01L27/1222 ,  H01L29/0673 ,  H01L29/42392 ,  H01L29/772 ,  H01L29/7843 ,  H01L29/78651 ,  H01L29/78696 ,  Y10S977/762 ,  Y10S977/938

Abstract: A semiconductor device has gate-all-around devices formed in respective regions on a substrate. The gate-all-around devices have nanowires at different levels. The threshold voltage of a gate-all-around device in first region is based on a thickness of an active layer in an adjacent second region. The active layer in the second region may be at substantially a same level as the nanowire in the first region. Thus, the nanowire in the first region may have a thickness based on the thickness of the active layer in the second region, or the thicknesses may be different. When more than one active layer is included, nanowires in different ones of the regions may be disposed at different heights and/or may have different thicknesses.

Abstract translation: 半导体器件具有形成在基板上的各个区域中的栅极全绕器件。 全门设备具有不同级别的纳米线。 第一区域中的栅极全周围器件的阈值电压基于相邻第二区域中的有源层的厚度。 第二区域中的有源层可以处于与第一区域中的纳米线基本相同的水平。 因此，第一区域中的纳米线可以具有基于第二区域中的有源层的厚度的厚度，或者厚度可以不同。 当包括多于一个活性层时，不同区域中的纳米线可以设置在不同的高度和/或可以具有不同的厚度。