公开(公告)号：US20230328985A1

公开(公告)日：2023-10-12

申请号：US18062251

申请日：2022-12-06

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sangmin Kang ,  Bio Kim ,  Kyungwook Park

IPC: H10B43/27 ,  H10B41/10 ,  H10B41/35 ,  H10B41/40 ,  H10B41/27 ,  H10B43/10 ,  H10B43/35 ,  H10B43/40 ,  H01L23/522 ,  H01L23/528 ,  G11C5/06

CPC classification number: H01L27/11582 ,  H01L27/11519 ,  H01L27/11524 ,  H01L27/11526 ,  H01L27/11556 ,  G11C5/06 ,  H01L27/1157 ,  H01L27/11573 ,  H01L23/5226 ,  H01L23/5283 ,  H01L27/11565

Abstract: A semiconductor device includes a peripheral circuit structure including: a first substrate, circuit devices on the first substrate, a lower wiring structure electrically connected to the circuit devices, a lower insulating layer covering the lower wiring structure, and a diffusion barrier layer on the lower insulating layer; and a memory cell structure including a second substrate including first and second regions on the peripheral circuit structure, gate electrodes stacked and spaced apart from each other in a first direction perpendicular to an upper surface of the second substrate in the first region and extending in a second direction perpendicular to the first direction to form a staircase shape in the second region, and channel structures penetrating the gate electrodes in the first direction and each including a channel layer. The diffusion barrier layer includes a first material layer having a hydrogen permeability lower than a hydrogen permeability of silicon nitride.

公开(公告)号：US10302824B2

公开(公告)日：2019-05-28

申请号：US15109804

申请日：2015-01-02

Applicant: CORNING PRECISION MATERIALS CO., LTD. ,  SAMSUNG ELECTRONICS CO., LTD.

Inventor： Seohyun Kim ,  Gunsang Yoon ,  Yunyoung Kwon ,  Kyungwook Park

IPC: H01L29/08 ,  G02B5/02 ,  H01L51/52 ,  C03C17/25

Abstract: Provided is a method of preparing a light scattering layer including voids as a light scattering enhancer instead of metal oxide particles. Provided is also a light scattering layer including voids as a light scattering enhancer instead of metal oxide particles. Provided is also an organic electroluminescent device including the light scattering layer that includes voids as the light scattering enhancer instead of metal oxide particles.

公开(公告)号：US11729966B2

公开(公告)日：2023-08-15

申请号：US17723218

申请日：2022-04-18

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yoongoo Kang ,  Wonseok Yoo ,  Hokyun An ,  Kyungwook Park ,  Dain Lee

IPC: H10B12/00 ,  G11C5/06 ,  H01L29/06

CPC classification number: H10B12/315 ,  G11C5/063 ,  H01L29/0649 ,  H10B12/0335 ,  H10B12/05 ,  H10B12/482

Abstract: A DRAM device includes an isolation region defining source and drain regions in a substrate, a first bit line structure connected to the source region, a second bit line structure disposed on the isolation region, an inner spacer vertically extending on a first sidewall of the first bit line structure, an air gap is between the inner spacer and an outer spacer, a storage contact between the first and second bit line structures and connected to the drain region, a landing pad structure vertically on the storage contact, and a storage structure vertically on the landing pad structure. The sealing layer seals a top of the first air gap. The sealing layer includes a first sealing layer on a first sidewall of a pad isolation trench, and a second sealing layer on a second sidewall of the pad isolation trench and separated from the first sealing layer.

公开(公告)号：US20210066200A1

公开(公告)日：2021-03-04

申请号：US16802676

申请日：2020-02-27

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kyungwook Park ,  Yoongoo Kang ,  Wonseok Yoo ,  Dain Lee

IPC: H01L23/532 ,  H01L27/108

Abstract: An integrated circuit device includes a conductive line formed on a substrate, an insulating spacer covering side walls of the conductive line and extending parallel with the conductive line, and a conductive plug that is spaced apart from the conductive line with the insulating spacer therebetween. The insulating spacer includes an insulating liner contacting the conductive line, an outer spacer contacting the conductive plug, and a barrier layer between the insulating liner and the outer spacer to prevent oxygen atoms from diffusing into the outer spacer.

公开(公告)号：US20200303409A1

公开(公告)日：2020-09-24

申请号：US16700801

申请日：2019-12-02

Applicant: Samsung Electronics Co., Ltd.

Inventor： Taisoo Lim ,  Kyungwook Park ,  Keun Lee ,  Hauk Han

IPC: H01L27/11582 ,  H01L29/423 ,  H01L21/67 ,  H01L27/11565 ,  H01L27/11573 ,  H01L21/285 ,  H01L21/28 ,  H01L21/3213 ,  C23C16/56 ,  C23C16/455 ,  C23C16/06

Abstract: A semiconductor device includes gate electrodes and interlayer insulating layers that are alternately stacked on a substrate, channel structures spaced apart from each other in a first direction and extending vertically through the gate electrodes and the interlayer insulating layers to the substrate, and a first separation region extending vertically through the gate electrodes and the interlayer insulating layers. Each gate electrode includes a first conductive layer and a second conductive layer, the first conductive layer disposed between the second conductive layer and each of two adjacent interlayer insulating layers. In a first region, between an outermost channel structure and the first separation region, of each gate electrode, the first conductive layer has a decreasing thickness toward the first separation region and the second conductive layer has an increasing thickness toward the first separation region.