公开(公告)号：US20180174977A1

公开(公告)日：2018-06-21

申请号：US15897465

申请日：2018-02-15

Applicant: Samsung Electronics Co., Ltd.

Inventor： VietHa Nguyen ,  Wookyung You ,  Inoue Naoya ,  Hak-Sun Lee ,  Byung-Kwon Cho ,  Songyi Han ,  Jongmin Baek ,  Jiwon Kang ,  Byunghee Kim ,  Young-Ju Park ,  Sanghoon Ahn ,  Jiwon Yun ,  Naein Lee ,  YoungWoo Cho

IPC: H01L23/532 ,  H01L23/522

CPC classification number: H01L23/53295 ,  H01L21/7682 ,  H01L21/76885 ,  H01L23/5222 ,  H01L23/528 ,  H01L23/53238 ,  H01L23/53266

Abstract: A semiconductor device includes an interlayer insulating layer including a first insulating layer on a substrate, and a plurality of interconnections in the first insulating layer. The interlayer insulating layer includes a first region, and a second region including an air gap. The air gap is defined between a pair of the interconnections in the second region. A top surface of the first insulating layer of the first region is lower than a top surface of at least one of the interconnections in the first region.

公开(公告)号：US20170170184A1

公开(公告)日：2017-06-15

申请号：US15357299

申请日：2016-11-21

Applicant: Samsung Electronics Co., Ltd.

Inventor： VietHa Nguyen ,  Wookyung You ,  Inoue Naoya ,  Hak-Sun Lee ,  Byung-Kwon Cho ,  Songyi Han ,  Jongmin Baek ,  Jiwon Kang ,  Byunghee Kim ,  Young-Ju Park ,  Sanghoon Ahn ,  Jiwon Yun ,  Naein Lee ,  YoungWoo Cho

IPC: H01L27/105 ,  H01L29/06

CPC classification number: H01L23/53295 ,  H01L23/5222 ,  H01L23/53238 ,  H01L23/53266

Abstract: A semiconductor device includes an interlayer insulating layer including a first insulating layer on a substrate, and a plurality of interconnections in the first insulating layer. The interlayer insulating layer includes a first region, and a second region including an air gap. The air gap is defined between a pair of the interconnections in the second region. A top surface of the first insulating layer of the first region is lower than a top surface of at least one of the interconnections in the first region.

公开(公告)号：US20140248761A1

公开(公告)日：2014-09-04

申请号：US14083654

申请日：2013-11-19

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sangjine Park ,  Boun Yoon ,  Jeongnam Han ,  Kee-Sang Kwon ,  Byung-Kwon Cho ,  Wonsang Choi

IPC: H01L21/8238

CPC classification number: H01L27/092 ,  H01L21/823807 ,  H01L21/823814 ,  H01L21/823871 ,  H01L29/161 ,  H01L29/4175 ,  H01L29/45 ,  H01L29/495 ,  H01L29/4966 ,  H01L29/517

Abstract: A semiconductor device is manufactured using dual metal silicide layers. The semiconductor device includes a substrate having first and second regions, a first metal gate electrode on the substrate in the first region, a second metal gate electrode on the substrate in the second region, a first epitaxial layer on and in the substrate at both sides of the first metal gate electrode, a second epitaxial layer on and in the substrate at both sides of the second metal gate electrode, a first metal silicide layer on the first epitaxial layer, a second metal silicide layer on the second epitaxial layer, an interlayer dielectric layer on the first and second metal silicide layers, contact plugs passing through the interlayer dielectric layer and electrically connected to the first and second metal silicide layers.

Abstract translation: 使用双金属硅化物层制造半导体器件。 半导体器件包括具有第一和第二区域的衬底，第一区域中的衬底上的第一金属栅电极，第二区域中的衬底上的第二金属栅电极，两侧的衬底上的第一外延层 的第二金属硅化物层，第二外延层上的第二金属硅化物层，第二外延层上的第二金属硅化物层，第二外延层上的第二金属硅化物层，第二外延层上的第二金属硅化物层， 在第一和第二金属硅化物层上的电介质层，通过层间电介质层并电连接到第一和第二金属硅化物层的接触插塞。