Pixel and display device including the same

    公开(公告)号:US11328665B2

    公开(公告)日:2022-05-10

    申请号:US17110725

    申请日:2020-12-03

    Abstract: A pixel including: a light-emitting diode; a first PMOS transistor including a first electrode connected to a node and a second electrode transmitting a driving current to the light-emitting diode; a second transistor connected between a data line and the node and turned on by a first scan signal; a third NMOS transistor connected between a gate electrode and the second electrode of the first transistor and turned on by a first emission control signal; a fourth NMOS transistor connected between the gate electrode of the first transistor and a first initialization voltage line and turned on by a second emission control signal; a fifth transistor connected between a driving voltage line and the node and turned on by the first emission control signal; and a sixth transistor connected between the second electrode of the first transistor and the light-emitting diode and turned on by the first emission control signal.

    DISPLAY APPARATUS
    14.
    发明公开
    DISPLAY APPARATUS 审中-公开

    公开(公告)号:US20240324303A1

    公开(公告)日:2024-09-26

    申请号:US18492708

    申请日:2023-10-23

    CPC classification number: H10K59/122 H10K59/131

    Abstract: A display apparatus includes: a display element including a pixel electrode on a substrate; a bus line spaced from the pixel electrode, and located at the same layer as that of the pixel electrode; a pixel-defining layer defining an emission area of the display element, the pixel-defining layer including: an opening overlapping with the pixel electrode, and exposing at least a portion of the pixel electrode; and a hole exposing a portion of the bus line adjacent to the pixel electrode; a separator on the pixel-defining layer; an intermediate layer on the pixel electrode; and an opposite electrode on the intermediate layer. In a plan view, the separator surrounds the pixel electrode and the hole together. The bus line includes: a first line layer; and a second line layer on the first line layer, and including a tip protruding more than an edge of the first line layer.

    Display apparatus and method of manufacturing the same

    公开(公告)号:US11281882B2

    公开(公告)日:2022-03-22

    申请号:US17213127

    申请日:2021-03-25

    Abstract: A method of manufacturing a display apparatus includes: forming first patterns of a semiconductor material on a base layer; forming a first insulating layer covering the first patterns; forming second patterns of a conductive material on the first insulating layer; removing at least a portion of at least one of the second patterns; and forming a second insulating layer on the second patterns. Each of the second patterns includes a first layer and a second layer disposed on the first layer, the first patterns include a semiconductor pattern, the second patterns include a control electrode pattern overlapping with the semiconductor pattern in a plan view and a sensing electrode pattern, the second layer of the control electrode pattern fully covers the first layer of the control electrode pattern, and the second layer of the sensing electrode pattern is partially removed in the removing of the at least a portion to partially cover the first layer of the sensing electrode pattern.

    DISPLAY APPARATUS AND METHOD OF MANUFACTURING THE SAME

    公开(公告)号:US20240324285A1

    公开(公告)日:2024-09-26

    申请号:US18426365

    申请日:2024-01-30

    CPC classification number: H10K59/1213 H10K59/1201

    Abstract: A display apparatus and a manufacturing method may avoid electrical shorting caused by protrusion structures that result from a difference in etch rates. The display apparatus includes a substrate, a semiconductor layer on the substrate, a first metal layer arranged on the semiconductor layer, insulated from the semiconductor layer, and including a first metal layer having a first etch rate under a predetermined condition, and a second metal layer arranged on the first metal layer, contacting an upper surface of the first metal layer, including a second metal material having a second etch rate under the predetermined condition, the second etch rate being less than the first etch rate, and arranged in the upper surface of the first metal layer when viewed in a direction perpendicular to the substrate.

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