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公开(公告)号:US12082463B2
公开(公告)日:2024-09-03
申请号:US17957277
申请日:2022-09-30
Applicant: Samsung Display Co., Ltd.
Inventor: Kiho Bang , Eunhye Kim , Youngwoo Park , Yonghwan Park , Saebom Ahn , Seongjun Lee , Sanghyun Jun
IPC: H10K59/131 , H10K50/844 , H10K59/121 , H10K59/122
CPC classification number: H10K59/131 , H10K50/844 , H10K59/121 , H10K59/122
Abstract: A display apparatus includes a first power supply voltage line in a non-display area and including a first conductive layer, a first organic layer on the first conductive layer, and a second conductive layer on the first organic layer, a second power supply voltage line in the non-display area and including a third conductive layer spaced apart from the first conductive layer, and a fourth conductive layer on the first organic layer which is on the third conductive layer, a first dam portion adjacent to the first power supply voltage line, a second dam portion adjacent to the first dam portion, and a third dam portion between the first power supply voltage line and the first dam portion. The fourth conductive layer includes an opening exposing an upper surface of the first organic layer between the first power supply voltage line and the second dam portion.
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公开(公告)号:US11983346B2
公开(公告)日:2024-05-14
申请号:US18168567
申请日:2023-02-13
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor: Hyunchul Kim , Seongjun Lee , Seongryong Lee , Wonsuk Choi , Yoonsun Choi
IPC: G06F3/041 , G02B5/30 , G06F3/047 , H10K50/805 , H10K50/84 , H10K59/122 , H10K59/124 , H10K59/131 , H10K59/38 , H10K71/00 , H10K77/10 , H10K59/40
CPC classification number: G06F3/0412 , G02B5/3025 , G06F3/047 , H10K50/805 , H10K50/84 , H10K59/122 , H10K59/124 , H10K59/131 , H10K59/38 , H10K71/00 , H10K77/111 , H10K59/40
Abstract: An OLED device includes a substrate having a display region including a pixel region and first and second peripheral regions surrounding the pixel region. A bending region is between the display region and the second peripheral region. A buffer layer has a first opening exposing an upper surface of the substrate. A plurality of pixel structures is disposed in the pixel region on the buffer layer. An insulation layer structure is disposed on the buffer layer. The insulation layer structure has a second opening exposing an upper surface of the substrate that is disposed in the bending region and a first portion of the buffer layer that is disposed adjacent to the bending region. A fan-out wiring is disposed between two adjacent insulation layers of the plurality of insulation layers. The fan-out wiring is disposed in the first peripheral region and/or the second peripheral region.
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公开(公告)号:US20230157074A1
公开(公告)日:2023-05-18
申请号:US18096623
申请日:2023-01-13
Applicant: Samsung Display Co., Ltd.
Inventor: Sewan Son , Moosoon Ko , Seokje Seong , Seongjun Lee , Jeongsoo Lee , Jiseon Lee , Changho Yi , Hyeri Cho
IPC: H10K59/121 , H10K59/126 , H10K59/131
CPC classification number: H10K59/1213 , H10K59/126 , H10K59/131 , H01L27/1225
Abstract: A display panel includes a substrate, a first thin film transistor including a first semiconductor layer and a first gate electrode, a data line extending in a first direction, a scan line extending in a second direction, a second thin film transistor electrically connected to the data line and including a second semiconductor layer and a second gate electrode, a third thin film transistor including a third semiconductor layer and a first upper gate electrode arranged on the third semiconductor layer, a node connection line electrically connecting the first thin film transistor and the third thin film transistor, and a shield line located between the data line and the node connection line in a plan view and including the same material as the first upper gate electrode of the third thin film transistor. The first semiconductor layer includes a silicon semiconductor, and the third semiconductor layer includes an oxide semiconductor.
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公开(公告)号:US11515376B2
公开(公告)日:2022-11-29
申请号:US17063698
申请日:2020-10-05
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor: Yoon-Jong Cho , Suyeon Yun , Seokje Seong , Seongjun Lee , Joonhoo Choi , Semyung Kwon , Kyunghyun Baek
IPC: H01L27/32 , H01L27/12 , G09G3/3225 , H01L51/52
Abstract: A display panel includes a base layer having a first region and a bent second region. An inorganic layer is disposed on the base layer. A lower groove is formed within the inorganic layer and overlaps the second region. A first thin-film transistor is disposed on the inorganic layer and includes a silicon semiconductor pattern overlapping the first region. A second thin-film transistor is disposed on the inorganic layer and includes an oxide semiconductor pattern overlapping the first region. Insulating layers overlap the first and second regions. An upper groove is formed within the insulating layers. A signal line electrically connects the second thin-film transistor. An organic layer overlaps the first and second regions and is disposed in the lower and upper grooves. A luminescent device is disposed on the organic layer and overlaps the first region.
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公开(公告)号:US11482589B2
公开(公告)日:2022-10-25
申请号:US17012538
申请日:2020-09-04
Applicant: Samsung Display Co., Ltd.
Inventor: Kiho Bang , Eunhye Kim , Youngwoo Park , Yonghwan Park , Saebom Ahn , Seongjun Lee , Sanghyun Jun
Abstract: A display apparatus includes a first power supply voltage line in a non-display area and including a first conductive layer, a first organic layer on the first conductive layer, and a second conductive layer on the first organic layer, a second power supply voltage line in the non-display area and including a third conductive layer spaced apart from the first conductive layer, and a fourth conductive layer on the first organic layer which is on the third conductive layer, a first dam portion adjacent to the first power supply voltage line, a second dam portion adjacent to the first dam portion, and a third dam portion between the first power supply voltage line and the first dam portion. The fourth conductive layer includes an opening exposing an upper surface of the first organic layer between the first power supply voltage line and the second dam portion.
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公开(公告)号:US11250234B2
公开(公告)日:2022-02-15
申请号:US17213127
申请日:2021-03-25
Applicant: Samsung Display Co., Ltd.
Inventor: Ju-won Yoon , Moosoon Ko , Youngwoo Park , Seongjun Lee
Abstract: A method of manufacturing a display apparatus includes: forming first patterns of a semiconductor material on a base layer; forming a first insulating layer covering the first patterns; forming second patterns of a conductive material on the first insulating layer; removing at least a portion of at least one of the second patterns; and forming a second insulating layer on the second patterns. Each of the second patterns includes a first layer and a second layer disposed on the first layer, the first patterns include a semiconductor pattern, the second patterns include a control electrode pattern overlapping with the semiconductor pattern in a plan view and a sensing electrode pattern, the second layer of the control electrode pattern fully covers the first layer of the control electrode pattern, and the second layer of the sensing electrode pattern is partially removed in the removing of the at least a portion to partially cover the first layer of the sensing electrode pattern.
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公开(公告)号:US20210141480A1
公开(公告)日:2021-05-13
申请号:US17157386
申请日:2021-01-25
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor: HYUNCHUL KIM , Seongjun Lee , Seongryong Lee , Wonsuk Choi , Yoonsun Choi
Abstract: An OLED device includes a substrate having a display region including a pixel region and first and second peripheral regions surrounding the pixel region. A bending region is between the display region and the second peripheral region. A buffer layer has a first opening exposing an upper surface of the substrate. A plurality of pixel structures is disposed in the pixel region on the buffer layer. An insulation layer structure is disposed on the buffer layer. The insulation layer structure has a second opening exposing an upper surface of the substrate that is disposed in the bending region and a first portion of the buffer layer that is disposed adjacent to the bending region. A fan-out wiring is disposed between two adjacent insulation layers of the plurality of insulation layers. The fan-out wiring is disposed in the first peripheral region and/or the second peripheral region.
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公开(公告)号:US10977471B2
公开(公告)日:2021-04-13
申请号:US15961513
申请日:2018-04-24
Applicant: Samsung Display Co., Ltd.
Inventor: Ju-Won Yoon , Moosoon Ko , Youngwoo Park , Seongjun Lee
Abstract: A display apparatus includes a display panel, a thin film transistor including a control electrode disposed on a surface of the display panel, a semiconductor pattern overlapping with the control electrode in a plan view, an input electrode connected to a portion of the semiconductor pattern, and an output electrode connected to another portion of the semiconductor pattern, a first insulating layer disposed between the control electrode and the semiconductor pattern, a second insulating layer covering the input electrode and the output electrode, and a sensing electrode disposed between the display panel and the second insulating layer.
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公开(公告)号:US20180314363A1
公开(公告)日:2018-11-01
申请号:US15961513
申请日:2018-04-24
Applicant: Samsung Display Co., Ltd.
Inventor: Ju-won Yoon , Moosoon Ko , Youngwoo Park , Seongjun Lee
Abstract: A display apparatus includes a display panel, a thin film transistor including a control electrode disposed on a surface of the display panel, a semiconductor pattern overlapping with the control electrode in a plan view, an input electrode connected to a portion of the semiconductor pattern, and an output electrode connected to another portion of the semiconductor pattern, a first insulating layer disposed between the control electrode and the semiconductor pattern, a second insulating layer covering the input electrode and the output electrode, and a sensing electrode disposed between the display panel and the second insulating layer.
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公开(公告)号:US12127456B2
公开(公告)日:2024-10-22
申请号:US18446418
申请日:2023-08-08
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor: Jinsung An , Jiseon Lee , Seokje Seong , Seongjun Lee
IPC: H01L27/14 , H10K59/121 , H10K59/126 , H10K59/131 , H01L27/12 , H01L29/786
CPC classification number: H10K59/131 , H10K59/1213 , H10K59/126 , H01L27/1225 , H01L27/124 , H01L27/1251 , H01L29/78651 , H01L29/7869
Abstract: A display device having a plurality of pixel structures, each of the plurality of the pixel structures including: a substrate; a first active pattern on the substrate; a first gate line on the first active pattern and extending in a first direction; a first connecting pattern on the first gate line and configured to transmit an initialization voltage; a second connecting pattern on the first connecting pattern and electrically connected to the first active pattern and the first connecting pattern; and a first electrode on the second connecting pattern and configured to be initialized in response to the initialization voltage.
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