公开(公告)号：US09366890B2

公开(公告)日：2016-06-14

申请号：US14139188

申请日：2013-12-23

Applicant: Samsung Display Co., Ltd.

Inventor： Duk-Sung Kim ,  Bong-Jun Lee ,  Sung Man Kim ,  Seul Ki Kim ,  Jin Yun Kim ,  Dong Wuuk Seo ,  Min Hee Son

IPC: G02F1/133 ,  G02F1/1343 ,  G02F1/1362

CPC classification number: G02F1/134309 ,  G02F1/13306 ,  G02F1/133345 ,  G02F1/1343 ,  G02F1/134363 ,  G02F1/13439 ,  G02F1/136286 ,  G02F1/1368 ,  G02F2001/134318 ,  G02F2001/134372 ,  G02F2001/136272 ,  G02F2201/121 ,  H01L27/1225 ,  H01L27/124 ,  H01L29/7869

Abstract: A display, includes: a substrate; first signal lines (FSLs) disposed on the substrate and extending in substantially a first direction; a gate insulating layer (GIL) disposed on the FSLs; a first electrode disposed on the GIL; a thin film transistor (TFT) connected to a FSL of the FSLs and including the GIL and the first electrode; a pixel electrode (PE) extending in substantially the first direction, connected to the TFT, and configured to receive a data voltage from the TFT; a common electrode (CE) overlapping with at least a portion of the PE; and a first insulating layer disposed between the PE and CE. One of the PE and the CE has a planar shape and the other includes branch electrodes overlapping with the planar shape and extending substantially parallel to the FSL. At least a portion of the CE overlaps with at least a portion of the FSL.

Abstract translation: 一种显示器，包括：基板; 第一信号线（FSL），其设置在基板上并且基本上沿第一方向延伸; 设置在FSL上的栅极绝缘层（GIL）; 设置在GIL上的第一电极; 连接到FSL的FSL并且包括GIL和第一电极的薄膜晶体管（TFT）; 基本上沿第一方向延伸的像素电极（PE），连接到TFT，并被配置为从TFT接收数据电压; 与PE的至少一部分重叠的公共电极（CE）; 以及设置在PE和CE之间的第一绝缘层。 PE和CE中的一个具有平面形状，另一个包括与平面形状重叠并且基本上平行于FSL延伸的分支电极。 CE的至少一部分与FSL的至少一部分重叠。

公开(公告)号：US09293101B2

公开(公告)日：2016-03-22

申请号：US14147062

申请日：2014-01-03

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Sung-Man Kim ,  Bong-Jun Lee ,  Shin-Tack Kang

IPC: G09G3/36 ,  G02F1/1343 ,  G02F1/1362

CPC classification number: G09G3/3659 ,  G02F1/134336 ,  G02F1/136286 ,  G09G3/3614 ,  G09G3/3677 ,  G09G2300/0426 ,  G09G2310/0218 ,  G09G2320/0219 ,  G09G2320/0247

Abstract: A liquid crystal display (LCD) includes a substrate; first and second pixel rows formed on the substrate and including a plurality of pixels; a first gate line extending in a row direction on the substrate and connected with the first pixel row; a second gate line extending in the row direction on the substrate, connected with the first pixel row; a third gate line extending in the row direction on the substrate, connected with the second pixel row, and adjacent to the second gate line; a fourth gate line extending in the row direction on the substrate, connected with the second pixel row; a plurality of data lines extending in a column direction on the substrate, wherein each of the data lines are disposed every two of the pixels; a first gate driver connected with the first and fourth gate lines and applying gate signals to the first and fourth gate lines; and a second gate driver connected with the second and third gate lines and applying gate signals to the second and third gate lines.

Abstract translation: 液晶显示器（LCD）包括基板; 第一和第二像素行，形成在基板上并且包括多个像素; 在所述基板上沿行方向延伸并与所述第一像素行连接的第一栅极线; 与所述第一像素列连接的在所述基板上的行方向上延伸的第二栅极线; 在所述基板上沿所述行方向延伸的第三栅极线，与所述第二像素行连接并且与所述第二栅极线相邻; 与所述第二像素列连接的在所述基板上沿行方向延伸的第四栅极线; 在基板上沿列方向延伸的多条数据线，其中，每两条像素都配置有数据线; 与第一和第四栅极线连接并将栅极信号施加到第一和第四栅极线的第一栅极驱动器; 以及与第二和第三栅极线连接并将栅极信号施加到第二和第三栅极线的第二栅极驱动器。

公开(公告)号：US20150268528A1

公开(公告)日：2015-09-24

申请号：US14486378

申请日：2014-09-15

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Bong-Jun Lee ,  Ji Young Jeong ,  Seul Ki Kim ,  Ju Hyeon Baek ,  Kyung-Seob Choi

IPC: G02F1/1362 ,  G02F1/1343

CPC classification number: G02F1/136286 ,  G02F1/133707 ,  G02F1/134309 ,  G02F2001/134318

Abstract: A display device includes a first insulation substrate, a gate line disposed on the first insulation substrate, a semiconductor layer disposed on the gate line, a data line insulated from and crossing the gate line and including a source electrode and a drain electrode facing the source electrode, a first insulating layer disposed on the source electrode and the drain electrode, a pixel electrode electrically connected to the drain electrode, a second insulating layer disposed on the pixel electrode, a common electrode disposed on the second insulating layer, and a shielding pattern part disposed on a same layer as the pixel electrode and overlapping the data line.

Abstract translation: 显示装置包括第一绝缘基板，设置在第一绝缘基板上的栅极线，设置在栅极线上的半导体层，与栅极线绝缘并与栅极线交叉的数据线，并且包括面向源极的源电极和漏电极 电极，设置在源电极和漏电极上的第一绝缘层，与漏电极电连接的像素电极，设置在像素电极上的第二绝缘层，设置在第二绝缘层上的公共电极和屏蔽图案 部分设置在与像素电极相同的层上并与数据线重叠。

公开(公告)号：US20140139418A1

公开(公告)日：2014-05-22

申请号：US14147062

申请日：2014-01-03

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： SUNG-MAN KIM ,  Bong-Jun Lee ,  Shin-Tack Kang

IPC: G09G3/36

CPC classification number: G09G3/3659 ,  G02F1/134336 ,  G02F1/136286 ,  G09G3/3614 ,  G09G3/3677 ,  G09G2300/0426 ,  G09G2310/0218 ,  G09G2320/0219 ,  G09G2320/0247

Abstract: A liquid crystal display (LCD) includes a substrate; first and second pixel rows formed on the substrate and including a plurality of pixels; a first gate line extending in a row direction on the substrate and connected with the first pixel row; a second gate line extending in the row direction on the substrate, connected with the first pixel row; a third gate line extending in the row direction on the substrate, connected with the second pixel row, and adjacent to the second gate line; a fourth gate line extending in the row direction on the substrate, connected with the second pixel row; a plurality of data lines extending in a column direction on the substrate, wherein each of the data lines are disposed every two of the pixels; a first gate driver connected with the first and fourth gate lines and applying gate signals to the first and fourth gate lines; and a second gate driver connected with the second and third gate lines and applying gate signals to the second and third gate lines.

Abstract translation: 液晶显示器（LCD）包括基板; 第一和第二像素行，形成在基板上并且包括多个像素; 在所述基板上沿行方向延伸并与所述第一像素行连接的第一栅极线; 与所述第一像素列连接的在所述基板上的行方向上延伸的第二栅极线; 在所述基板上沿所述行方向延伸的第三栅极线，与所述第二像素行连接并且与所述第二栅极线相邻; 与所述第二像素列连接的在所述基板上沿行方向延伸的第四栅极线; 在基板上沿列方向延伸的多条数据线，其中，每两条像素都配置有数据线; 与第一和第四栅极线连接并将栅极信号施加到第一和第四栅极线的第一栅极驱动器; 以及与第二和第三栅极线连接并将栅极信号施加到第二和第三栅极线的第二栅极驱动器。

公开(公告)号：US09459505B2

公开(公告)日：2016-10-04

申请号：US14486378

申请日：2014-09-15

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Bong-Jun Lee ,  Ji Young Jeong ,  Seul Ki Kim ,  Ju Hyeon Baek ,  Kyung-Seob Choi

IPC: G02F1/1343 ,  G02F1/1362 ,  G02F1/1337

CPC classification number: G02F1/136286 ,  G02F1/133707 ,  G02F1/134309 ,  G02F2001/134318

Abstract: A display device includes a first insulation substrate, a gate line disposed on the first insulation substrate, a semiconductor layer disposed on the gate line, a data line insulated from and crossing the gate line and including a source electrode and a drain electrode facing the source electrode, a first insulating layer disposed on the source electrode and the drain electrode, a pixel electrode electrically connected to the drain electrode, a second insulating layer disposed on the pixel electrode, a common electrode disposed on the second insulating layer, and a shielding pattern part disposed on a same layer as the pixel electrode and overlapping the data line.

Abstract translation: 显示装置包括第一绝缘基板，设置在第一绝缘基板上的栅极线，设置在栅极线上的半导体层，与栅极线绝缘并与栅极线交叉的数据线，并且包括面向源极的源电极和漏电极 电极，设置在源电极和漏电极上的第一绝缘层，与漏电极电连接的像素电极，设置在像素电极上的第二绝缘层，设置在第二绝缘层上的公共电极和屏蔽图案 部分设置在与像素电极相同的层上并与数据线重叠。

公开(公告)号：US20140226101A1

公开(公告)日：2014-08-14

申请号：US14139230

申请日：2013-12-23

Applicant: Samsung Display Co., Ltd.

Inventor： Duk-Sung KIM ,  Bong-Jun Lee ,  Sung Man Kim ,  Seul Ki Kim ,  Jin Yun Kim ,  Dong Wuuk Seo ,  Min Hee Son

IPC: G02F1/1343

CPC classification number: G02F1/134309 ,  G02F1/13306 ,  G02F1/133345 ,  G02F1/1343 ,  G02F1/134363 ,  G02F1/13439 ,  G02F1/136286 ,  G02F1/1368 ,  G02F2001/134318 ,  G02F2001/134372 ,  G02F2001/136272 ,  G02F2201/121 ,  H01L27/1225 ,  H01L27/124 ,  H01L29/7869

Abstract: A display, includes: a substrate; first signal lines (FSLs) at least partially recessed in the substrate and extending in substantially a direction; a gate insulating layer (GIL) disposed on the FSLs; a first electrode disposed on the GIL; a thin film transistor (TFT) connected to a FSL of the FSLs and including the GIL and the first electrode; a pixel electrode (PE) extending in substantially the direction, connected to the TFT, and configured to receive a data voltage from the TFT; a common electrode (CE) overlapping with at least a portion of the PE; and a first insulating layer disposed between the PE and CE. One of the PE and the CE has a planar shape and the other includes branch electrodes overlapping with the planar shape and extending substantially parallel to the FSL. At least a portion of the CE overlaps with at least a portion of the FSL.

Abstract translation: 一种显示器，包括：基板; 至少部分地凹陷在基底中并沿基本上一个方向延伸的第一信号线（FSL） 设置在FSL上的栅极绝缘层（GIL）; 设置在GIL上的第一电极; 连接到FSL的FSL并且包括GIL和第一电极的薄膜晶体管（TFT）; 大致沿着所述方向延伸并且连接到所述TFT并且被配置为从所述TFT接收数据电压的像素电极（PE） 与PE的至少一部分重叠的公共电极（CE）; 以及设置在PE和CE之间的第一绝缘层。 PE和CE中的一个具有平面形状，另一个包括与平面形状重叠并且基本上平行于FSL延伸的分支电极。 CE的至少一部分与FSL的至少一部分重叠。

公开(公告)号：US10957242B2

公开(公告)日：2021-03-23

申请号：US16583018

申请日：2019-09-25

Applicant: Samsung Display Co., Ltd.

Inventor： Jung Hwan Hwang ,  Beom Jun Kim ,  Seong Yeol Syn ,  Bong-Jun Lee ,  You Mee Hyun

IPC: G09G3/20 ,  G09G3/36 ,  G11C19/28

Abstract: A display panel is provided. The display panel includes a display area comprising a gate line and a data line, and a gate driver connected to a terminal of the gate line. The gate driver includes a plurality of stages that are integrated on a substrate, and each stage comprises an inverter unit, an output unit, and a Q node stabilization unit. The output unit includes a first transistor and a first capacitor, wherein the first transistor includes an input terminal for receiving a clock signal, a control terminal connected to a node Q, and an output terminal connected to a gate voltage output terminal to output a gate voltage. A Vgs voltage of a transistor in the Q node stabilization unit has a value of equal to or less than 0 V when the output unit outputs a gate-on voltage.

公开(公告)号：US10467946B2

公开(公告)日：2019-11-05

申请号：US15417092

申请日：2017-01-26

Applicant: Samsung Display Co., Ltd.

Inventor： Jung Hwan Hwang ,  Beom Jun Kim ,  Seong Yeol Syn ,  Bong-Jun Lee ,  You Mee Hyun

IPC: G09G3/20 ,  G09G3/36 ,  G11C19/28

Abstract: A display panel is provided. The display panel includes a display area comprising a gate line and a data line, and a gate driver connected to a terminal of the gate line. The gate driver includes a plurality of stages that are integrated on a substrate, and each stage comprises an inverter unit, an output unit, and a Q node stabilization unit. The output unit includes a first transistor and a first capacitor, wherein the first transistor includes an input terminal for receiving a clock signal, a control terminal connected to a node Q, and an output terminal connected to a gate voltage output terminal to output a gate voltage. A Vgs voltage of a transistor in the Q node stabilization unit has a value of equal to or less than 0 V when the output unit outputs a gate-on voltage.

公开(公告)号：US10115365B2

公开(公告)日：2018-10-30

申请号：US15231246

申请日：2016-08-08

Applicant: Samsung Display Co., Ltd.

Inventor： Beom-Jun Kim ,  Myung-Koo Hur ,  Bong-Jun Lee ,  Yeon-Kyu Moon ,  Myung-Sub Lee ,  Gyu-Tae Kim

IPC: G09G3/36 ,  G11C19/28 ,  H03K17/693

Abstract: A gate driving circuit including a plurality of stages connected with each other and configured to output a plurality of gate signals. An n-th (n is a natural number) stage including a gate output part including a first transistor connected between a clock signal and an output node outputting an n-th gate signal, the first transistor having a gate electrode connected to a control node, a carry part connected between the clock signal and a carry node outputting an n-th carry signal, a first node control part connected between the output node and a first low voltage, and a second node control part including at least one transistor connected between the control node and a second low voltage different from the first low voltage.

公开(公告)号：US09601075B2

公开(公告)日：2017-03-21

申请号：US14319233

申请日：2014-06-30

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Bong-Jun Lee ,  Ji-Young Jeong ,  Ju-Hyeon Baek ,  Dong-Wuuk Seo ,  Byeong-Jae Ahn

IPC: G06F1/00 ,  G09G3/36 ,  G02F1/1335 ,  G02F1/1333

CPC classification number: G09G3/3685 ,  G02F1/133512 ,  G02F1/133514 ,  G02F2001/133388 ,  G09G2310/0283 ,  Y10T29/49117

Abstract: A display panel includes a plurality of pixels disposed in an active area and arranged substantially in a matrix form including a pixel row and a pixel column, a first gate line disposed adjacent to a first side n of the pixel row and connected to a first pixel in the pixel row, a second gate line disposed adjacent to a second side of the pixel row and connected to a second pixel in the pixel row, a plurality of data lines crossing the first and second gate lines, where the pixels in a pair of adjacent pixel columns are connected to a same data line, and a blocking pattern which overlaps a pixel column disposed in an end portion of the active area.