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公开(公告)号：US11349448B2
公开(公告)日：2022-05-31
申请号：US16586153
申请日：2019-09-27
Applicant: Silicon Laboratories Inc.
Inventor： Ruifeng Sun , Francesco Barale , Vinod Jayakumar , Sherry Xiaohong Wu , Mustafa H. Koroglu , Essam S. Atalla
Abstract: Systems and methods are disclosed for on-chip harmonic filtering for radio frequency (RF) communications. For disclosed embodiments, a filter circuit is coupled between a first internal node and a connection pad for an integrated circuit. The filter circuit includes a first inductance, a variable capacitance, and a second inductance. The capacitance amount for the variable capacitance is controlled to tune filtering for the filter circuit to a harmonic of a frequency for a transmit output signal. A power amplifier outputs the transmit output signal to the connection pad without passing through the filter circuit. The filter circuit filters the harmonic of the frequency for the transmit output signal, shunting harmonic current to ground. For one embodiment, the filtered harmonic is a third harmonic of the transmit frequency. For one embodiment, the transmit output signal has an output power greater than or equal to 15 dBm.
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公开(公告)号：US20210328578A1
公开(公告)日：2021-10-21
申请号：US17240226
申请日：2021-04-26
Applicant: Silicon Laboratories Inc.
Inventor： Ruifeng Sun , Abdulkerim Coban
Abstract: In one embodiment, a tuning network includes: a controllable capacitance; a first switch coupled between the controllable capacitance and a reference voltage node; a second switch coupled between the controllable capacitance and a third switch; the third switch coupled between the second switch and a second voltage node; a fourth switch coupled between the second voltage node and a first inductor; the first inductor having a first terminal coupled to the fourth switch and a second terminal coupled to at least the second switch; and a second inductor having a first terminal coupled to the second terminal of the first inductor and a second terminal coupled to the controllable capacitance.
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公开(公告)号：US20210013857A1
公开(公告)日：2021-01-14
申请号：US16846520
申请日：2020-04-13
Applicant: Silicon Laboratories Inc.
Inventor： Essam S. Atalla , Ruifeng Sun , Mohamed M. Elkholy
Abstract: Systems and methods are disclosed for on-chip harmonic filtering for radio frequency (RF) communications. A filtering and matching circuit for an integrated circuit includes a first capacitance coupled in parallel with a first inductance, a second inductance coupled to the first inductance, and a variable second capacitance coupled between the first and second inductance. The variable second capacitance is controlled to provide filtering with respect to the RF signal as well as impedance matching with respect to a load coupled to the connection pad. For one embodiment, the variable second capacitance includes a coarse-tune variable capacitor circuit and a fine-tune variable capacitor circuit. The coarse-tuning controls impedance matching, and the fine tuning controls a notch for the filtering. The load can be an antenna for the RF communications. The integrated circuit can include a receive path, a transmit path, or both.
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Patent Agency Ranking
公开(公告)号：US12009793B2
公开(公告)日：2024-06-11
申请号：US18175593
申请日：2023-02-28
Applicant: Silicon Laboratories Inc.
Inventor： Ruifeng Sun , Sherry Wu , Michael S. Johnson , Vitor Pereira
CPC classification number: H03F3/245 , H03F1/0233 , H04B1/04 , H04L27/12 , H03F2200/105 , H03F2200/451 , H04B2001/0408
Abstract: In one embodiment, a dual-mode power amplifier that can operate in different modes includes: a first pair of metal oxide semiconductor field effect transistors (MOSFETs) to receive and pass a constant envelope signal; a second pair of MOSFETs to receive and pass a variable envelope signal, where first terminals of the first pair of MOSFETs are coupled to first terminals of the second pair of MOSFETs, and second terminals of the first pair of MOSFETs are coupled to. second terminals of the second pair of MOSFETs; and a shared MOSFET stack coupled to the first pair of MOSFETs and the second pair of MOSFETs.
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公开(公告)号：US11374555B2
公开(公告)日：2022-06-28
申请号：US17240226
申请日：2021-04-26
Applicant: Silicon Laboratories Inc.
Inventor： Ruifeng Sun , Abdulkerim Coban
Abstract: In one embodiment, a tuning network includes: a controllable capacitance; a first switch coupled between the controllable capacitance and a reference voltage node; a second switch coupled between the controllable capacitance and a third switch; the third switch coupled between the second switch and a second voltage node; a fourth switch coupled between the second voltage node and a first inductor; the first inductor having a first terminal coupled to the fourth switch and a second terminal coupled to at least the second switch; and a second inductor having a first terminal coupled to the second terminal of the first inductor and a second terminal coupled to the controllable capacitance.
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16.发明申请公开(公告)号：US20210257970A1
公开(公告)日：2021-08-19
申请号：US16793985
申请日：2020-02-18
Applicant: Silicon Laboratories Inc.
Inventor： Ruifeng Sun , Ricky Setiawan , Ben Wee-Guan Tan
Abstract: A power amplifier for a radio frequency transceiver including a driver, a disable circuit, and a bias circuit. The driver includes a source node for receiving a drive voltage when enabled and includes an output node that is susceptible to strong blocker signals when disabled. The bias circuit includes first and second bias nodes for driving the voltage level of the source and output nodes, respectively, to suitable bias voltage levels to minimize impact of blocker signals. The disable circuit includes switch circuits to couple the driver to the bias circuit in the disable mode. The bias circuit may include at least one voltage source. The bias circuit may be coupled to a supply voltage and may include a voltage divider coupled between the source and output nodes. The bias circuit may include a source-follower circuit to isolate the bias voltages from variations of the supply voltage.
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公开(公告)号：US20210099148A1
公开(公告)日：2021-04-01
申请号：US16586153
申请日：2019-09-27
Applicant: Silicon Laboratories Inc.
Inventor： Ruifeng Sun , Francesco Barale , Vinod Jayakumar , Sherry Xiaohong Wu , Mustafa H. Koroglu , Essam S. Atalla
Abstract: Systems and methods are disclosed for on-chip harmonic filtering for radio frequency (RF) communications. For disclosed embodiments, a filter circuit is coupled between a first internal node and a connection pad for an integrated circuit. The filter circuit includes a first inductance, a variable capacitance, and a second inductance. The capacitance amount for the variable capacitance is controlled to tune filtering for the filter circuit to a harmonic of a frequency for a transmit output signal. A power amplifier outputs the transmit output signal to the connection pad without passing through the filter circuit. The filter circuit filters the harmonic of the frequency for the transmit output signal, shunting harmonic current to ground. For one embodiment, the filtered harmonic is a third harmonic of the transmit frequency. For one embodiment, the transmit output signal has an output power greater than or equal to 15 dBm.
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公开(公告)号：US10951190B2
公开(公告)日：2021-03-16
申请号：US16846520
申请日：2020-04-13
Applicant: Silicon Laboratories Inc.
Inventor： Essam S. Atalla , Ruifeng Sun , Mohamed M. Elkholy
Abstract: Systems and methods are disclosed for on-chip harmonic filtering for radio frequency (RF) communications. A filtering and matching circuit for an integrated circuit includes a first capacitance coupled in parallel with a first inductance, a second inductance coupled to the first inductance, and a variable second capacitance coupled between the first and second inductance. The variable second capacitance is controlled to provide filtering with respect to the RF signal as well as impedance matching with respect to a load coupled to the connection pad. For one embodiment, the variable second capacitance includes a coarse-tune variable capacitor circuit and a fine-tune variable capacitor circuit. The coarse-tuning controls impedance matching, and the fine tuning controls a notch for the filtering. The load can be an antenna for the RF communications. The integrated circuit can include a receive path, a transmit path, or both.
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