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公开(公告)号:US11837581B2
公开(公告)日:2023-12-05
申请号:US17983487
申请日:2022-11-09
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Youngsang Cho , Heeseok Lee , Yunhyeok Im , Moonseob Jeong
IPC: H01L25/065 , H01L23/538 , H01L23/498 , H01L23/31
CPC classification number: H01L25/0657 , H01L23/3128 , H01L23/3135 , H01L23/49811 , H01L23/5385 , H01L2225/06572
Abstract: A semiconductor package includes a package substrate, a lower semiconductor chip on the package substrate, an interposer on the lower semiconductor chip, the interposer including a plurality of pieces spaced apart from each other, an upper semiconductor chip on the interposer, and a molding member covering the lower semiconductor chip and the interposer.
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公开(公告)号:US11373933B2
公开(公告)日:2022-06-28
申请号:US17016115
申请日:2020-09-09
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Heeseok Lee , Yunhyeok Im
IPC: H01L23/48 , H01L23/498 , H01L23/31 , H01L25/10 , H01L23/40
Abstract: A semiconductor package includes; a lower semiconductor chip mounted on a lower package substrate, an interposer on the lower package substrate and including an opening, connection terminals spaced apart from and at least partially surrounding the lower semiconductor chip and extending between the lower package substrate and the interposer, a first molding member including a first material and covering at least a portion of a top surface of the lower semiconductor chip and at least portions of edge surfaces of the lower semiconductor chip, wherein the first molding member includes a protrusion that extends upward from the opening to cover at least portions of a top surface of the interposer proximate to the opening, and a second molding member including a second material, at least partially surrounding the first molding member, and covering side surfaces of the first molding member and the connection terminals, wherein the first material has thermal conductivity greater than the second material.
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公开(公告)号:US11037913B2
公开(公告)日:2021-06-15
申请号:US16854971
申请日:2020-04-22
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Yunhyeok Im , Kyoung-Min Lee , Kyungsoo Lee , Horang Jang
IPC: H01L25/10 , H01L23/367 , H01L23/498 , H01L23/42 , H01L23/552 , H01L23/538 , H01L23/00
Abstract: A semiconductor package includes a bottom package having a lower substrate and a lower semiconductor chip mounted on the lower substrate, an interposer substrate on the bottom package, a first top package and a second top package that are mounted on the interposer substrate, and a heat spreader that is interposed between the first top package and the second top package and separates the first and second top packages from each other. The heat spreader is adhered to the interposer substrate through a plurality of first connection terminals.
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公开(公告)号:US09029998B2
公开(公告)日:2015-05-12
申请号:US14243165
申请日:2014-04-02
Applicant: Samsung Electronics Co., Ltd.
Inventor: Eon Soo Jang , Kyol Park , Yunhyeok Im
CPC classification number: H01L23/34 , H01L23/12 , H01L23/3128 , H01L23/42 , H01L23/49811 , H01L23/5389 , H01L24/13 , H01L24/16 , H01L24/29 , H01L24/32 , H01L24/48 , H01L24/73 , H01L25/0655 , H01L25/0657 , H01L25/105 , H01L2224/131 , H01L2224/16225 , H01L2224/2919 , H01L2224/29194 , H01L2224/2929 , H01L2224/29309 , H01L2224/32145 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/73253 , H01L2224/73265 , H01L2225/0651 , H01L2225/06568 , H01L2225/1023 , H01L2225/1058 , H01L2225/1076 , H01L2225/1094 , H01L2924/00014 , H01L2924/12042 , H01L2924/1431 , H01L2924/1433 , H01L2924/1436 , H01L2924/1438 , H01L2924/15311 , H01L2924/15331 , H01L2924/181 , H01L2924/1815 , H01L2924/18161 , H01L2924/3511 , H01L2924/00012 , H01L2924/014 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
Abstract: A semiconductor package device includes a lower package including a lower semiconductor chip mounted on the lower package substrate, a lower molding compound layer disposed on the lower package substrate, a first trench formed in the lower molding compound layer to surround the lower semiconductor chip, and a second trench connected to the first trench to extend to an outer wall of the lower package, the second trench being formed in the lower molding compound layer, an upper package disposed on the lower package. The upper package includes an upper package substrate and at least one upper semiconductor chip mounted on the upper package substrate and a heat transfer member disposed between the lower package and the upper package.
Abstract translation: 半导体封装器件包括下封装,其包括安装在下封装基板上的下半导体芯片,设置在下封装基板上的下模塑复合层,形成在下模塑复合层中以围绕下半导体芯片的第一沟槽,以及 连接到所述第一沟槽以延伸到所述下封装的外壁的第二沟槽,所述第二沟槽形成在所述下模塑复合层中,所述上封装设置在所述下封装上。 上封装包括上封装基板和安装在上封装基板上的至少一个上半导体芯片和设置在下封装和上封装之间的传热构件。
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