公开(公告)号：US20180174889A1

公开(公告)日：2018-06-21

申请号：US15885067

申请日：2018-01-31

Applicant: Samsung Electronics Co., Ltd.

Inventor： Young-Sang Youn ,  Myung-geun Song ,  Ji-hoon Cha ,  Jae-jik Baek ,  Bo-un Yoon ,  Jeong-nam Han

IPC: H01L21/762 ,  H01L21/763 ,  H01L21/265 ,  H01L21/8234

Abstract: A method of manufacturing a semiconductor device includes forming a plurality of fins by forming a plurality of first device isolating trenches repeated at a first pitch in a substrate, forming a plurality of fin-type active areas protruding from a top surface of a first device isolating layer by forming the first device isolating layer in the plurality of first device isolating trenches, forming a plurality of second device isolating trenches at a pitch different from the first pitch by etching a portion of the substrate and the first device isolating layer, and forming a second device isolating layer in the plurality of second device isolating trenches, so as to form a plurality of fin-type active area groups separated from each other with the second device isolating layer therebetween.

公开(公告)号：US09831186B2

公开(公告)日：2017-11-28

申请号：US14736455

申请日：2015-06-11

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ki-hyun Park ,  Byoung-ho Kwon ,  Dong-chan Kim ,  Choong-seob Shin ,  Jong-su Kim ,  Bo-un Yoon

IPC: H01L21/66 ,  H01L23/544 ,  H01L21/4757 ,  H01L21/768

CPC classification number: H01L23/544 ,  H01L21/47573 ,  H01L21/76802 ,  H01L21/76807 ,  H01L21/7684 ,  H01L22/12 ,  H01L2223/54426 ,  H01L2223/5446 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A method of manufacturing a semiconductor device includes forming a first alignment mark trench in a first material layer on a substrate. A first alignment mark via may then be formed by etching a second material layer that is underneath the first material layer, where the first alignment mark via is positioned to communicate with the first alignment mark trench. Then, a trench-via-merged-type first alignment mark may be formed by filling the first alignment mark trench and the first alignment mark via with a light reflection material layer.

公开(公告)号：US20170301581A1

公开(公告)日：2017-10-19

申请号：US15637552

申请日：2017-06-29

Applicant: Samsung Electronics Co., Ltd.

Inventor： Young-Sang Youn ,  Myung-geun Song ,  Ji-hoon Cha ,  Jae-jik Baek ,  Bo-un Yoon ,  Jeong-nam Han

IPC: H01L21/762 ,  H01L21/8234 ,  H01L21/763 ,  H01L21/265

CPC classification number: H01L21/76229 ,  H01L21/2652 ,  H01L21/763 ,  H01L21/823431 ,  H01L21/823481 ,  H01L21/845 ,  H01L27/0886 ,  H01L29/0649 ,  H01L29/0657

Abstract: A method of manufacturing a semiconductor device includes forming a plurality of fins by forming a plurality of first device isolating trenches repeated at a first pitch in a substrate, forming a plurality of fin-type active areas protruding from a top surface of a first device isolating layer by forming the first device isolating layer in the plurality of first device isolating trenches, forming a plurality of second device isolating trenches at a pitch different from the first pitch by etching a portion of the substrate and the first device isolating layer, and forming a second device isolating layer in the plurality of second device isolating trenches, so as to form a plurality of fin-type active area groups separated from each other with the second device isolating layer therebetween.