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公开(公告)号:US10012900B2
公开(公告)日:2018-07-03
申请号:US15218284
申请日:2016-07-25
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Jong-su Kim , Shuichi Tamamushi , In-kyun Shin , Sung-il Lee , Jin Choi
CPC classification number: G03F1/70 , G03F1/78 , G03F7/2059 , G03F7/70616 , G03F7/70875
Abstract: A method of manufacturing a reticle, the method including preparing a substrate, determining position data of a pattern to be formed on the substrate, and setting a primary exposure condition to form the pattern; performing a primary exposure simulation regarding the substrate based on the position data of the pattern and the primary exposure condition; calculating a primary deformation rate of the substrate, which is generated in the primary exposure simulation; correcting the position data of the pattern based on the primary deformation rate of the substrate to provide a corrected position data of the pattern; and exposing the substrate under the primary exposure condition based on the corrected position data of the pattern.
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公开(公告)号:US09831186B2
公开(公告)日:2017-11-28
申请号:US14736455
申请日:2015-06-11
Applicant: Samsung Electronics Co., Ltd.
Inventor: Ki-hyun Park , Byoung-ho Kwon , Dong-chan Kim , Choong-seob Shin , Jong-su Kim , Bo-un Yoon
IPC: H01L21/66 , H01L23/544 , H01L21/4757 , H01L21/768
CPC classification number: H01L23/544 , H01L21/47573 , H01L21/76802 , H01L21/76807 , H01L21/7684 , H01L22/12 , H01L2223/54426 , H01L2223/5446 , H01L2924/0002 , H01L2924/00
Abstract: A method of manufacturing a semiconductor device includes forming a first alignment mark trench in a first material layer on a substrate. A first alignment mark via may then be formed by etching a second material layer that is underneath the first material layer, where the first alignment mark via is positioned to communicate with the first alignment mark trench. Then, a trench-via-merged-type first alignment mark may be formed by filling the first alignment mark trench and the first alignment mark via with a light reflection material layer.
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