POWER SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
    11.
    发明申请
    POWER SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME 审中-公开
    功率半导体器件及其制造方法

    公开(公告)号:US20150144989A1

    公开(公告)日:2015-05-28

    申请号:US14266121

    申请日:2014-04-30

    CPC classification number: H01L29/1095 H01L29/66348 H01L29/7397

    Abstract: A power semiconductor device may include: a first semiconductor region having a first conductivity type; a second semiconductor region having a second conductivity type and formed on the first semiconductor region; a third semiconductor region having the first conductivity type and formed in an upper portion of the second semiconductor region; a trench gate formed to penetrate from the third semiconductor region to the first semiconductor region, having a gate insulating layer formed on a surface thereof, and filled with a conductive material; and a fourth semiconductor region having the second conductivity type and formed to penetrate through the second semiconductor region.

    Abstract translation: 功率半导体器件可以包括:具有第一导电类型的第一半导体区域; 具有第二导电类型并形成在第一半导体区上的第二半导体区; 具有第一导电类型并形成在第二半导体区域的上部的第三半导体区域; 形成为从第三半导体区域穿透到第一半导体区域的沟槽栅极,在其表面上形成有栅极绝缘层,并填充有导电材料; 以及具有第二导电类型并形成为穿透第二半导体区域的第四半导体区域。

    POWER SEMICONDUCTOR DEVICE
    12.
    发明申请
    POWER SEMICONDUCTOR DEVICE 审中-公开
    功率半导体器件

    公开(公告)号:US20150076652A1

    公开(公告)日:2015-03-19

    申请号:US14101066

    申请日:2013-12-09

    CPC classification number: H01L29/861 H01L29/0615

    Abstract: There is provided a power semiconductor device, including: a first semiconductor layer of a first conductive type having a thickness of t1 so as to withstand a reverse voltage of 600V; and a second semiconductor layer of a second conductive type formed inside an upper portion of the first semiconductor layer and having a thickness of t2, wherein t1/t2 is 15 to 18.

    Abstract translation: 提供了一种功率半导体器件,包括:具有厚度为t1的第一导电类型的第一半导体层,以承受600V的反向电压; 以及第二导电类型的第二半导体层,形成在所述第一半导体层的上部内并具有厚度t2,其中t1 / t2为15至18。

    POWER SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
    14.
    发明申请
    POWER SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME 有权
    功率半导体器件及其制造方法

    公开(公告)号:US20140167150A1

    公开(公告)日:2014-06-19

    申请号:US13871082

    申请日:2013-04-26

    Abstract: There is provided a power semiconductor device including a contact formed in an active region, a trench gate extendedly formed from the first region into a first termination region and formed alternately with the contact, a first conductive well formed between the contact of the active region and the trench gate, a first conductive well extending portion formed in the first termination region and a part of a second termination region, and a first conductive field limiting ring formed in the second termination region and contacting the well extending portion.

    Abstract translation: 提供了一种功率半导体器件,包括形成在有源区中的触点,从第一区延伸形成第一终端区并与触点交替形成的沟槽栅,形成在有源区的触点和 沟槽栅极,形成在第一端接区域中的第一导电阱延伸部分和第二端接区域的一部分,以及形成在第二端接区域中并接触阱延伸部分的第一导电场限制环。

    INSULATED GATE BIPOLAR TRANSISTOR
    15.
    发明申请
    INSULATED GATE BIPOLAR TRANSISTOR 有权
    绝缘栅双极晶体管

    公开(公告)号:US20140138736A1

    公开(公告)日:2014-05-22

    申请号:US13751916

    申请日:2013-01-28

    CPC classification number: H01L29/7397 H01L29/1095

    Abstract: There is provided an insulated gate bipolar transistor including: a first semiconductor area of a first conductivity type; a second semiconductor area of a second conductivity type formed on one surface of the first semiconductor area; third semiconductor areas of the first conductivity type continuously formed in a length direction on one surface of the second semiconductor area; a plurality of trenches formed between the third semiconductor areas, extending to an inside of the second semiconductor area, and being continuous in the length direction; a fourth semiconductor area of the second conductivity type formed on one surface of the third semiconductor areas, insulation layers formed inside the trenches; gate electrodes buried inside the insulation layers; and a barrier layer formed in at least one of locations corresponding to the third semiconductor areas inside the second semiconductor area.

    Abstract translation: 提供了一种绝缘栅双极晶体管,包括:第一导电类型的第一半导体区域; 形成在第一半导体区域的一个表面上的第二导电类型的第二半导体区域; 在第二半导体区域的一个表面上沿长度方向连续形成的第一导电类型的第三半导体区域; 多个沟槽,形成在第三半导体区域之间,延伸到第二半导体区域的内部,并且在长度方向上是连续的; 形成在第三半导体区域的一个表面上的第二导电类型的第四半导体区域,形成在沟槽内的绝缘层; 掩埋在绝缘层内的栅电极; 以及形成在与所述第二半导体区域内的所述第三半导体区域对应的位置中的至少一个的阻挡层。

    SEMICONDUCTOR DEVICE
    16.
    发明申请
    SEMICONDUCTOR DEVICE 审中-公开
    半导体器件

    公开(公告)号:US20140117405A1

    公开(公告)日:2014-05-01

    申请号:US13746616

    申请日:2013-01-22

    CPC classification number: H01L29/7397

    Abstract: There is provided a semiconductor device including: a first semiconductor region having a first conductivity type; a second semiconductor region having a second conductivity type and formed on one surface of the first semiconductor region; a third semiconductor region having a first conductivity type and formed on one surface of the second semiconductor region; a gate electrode formed in a trench penetrating through the second semiconductor region and the third semiconductor region to reach an interior of the first semiconductor region; and a hole injection unit formed between the gate electrode and the first semiconductor region.

    Abstract translation: 提供一种半导体器件,包括:具有第一导电类型的第一半导体区域; 具有第二导电类型并形成在第一半导体区域的一个表面上的第二半导体区域; 具有第一导电类型并形成在第二半导体区域的一个表面上的第三半导体区域; 形成在穿过所述第二半导体区域的沟槽和所述第三半导体区域中以到达所述第一半导体区域的内部的栅电极; 以及形成在所述栅极电极和所述第一半导体区域之间的空穴注入单元。

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