公开(公告)号：US20180277473A1

公开(公告)日：2018-09-27

申请号：US15989771

申请日：2018-05-25

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Kazuyuki NAKAGAWA ,  Shinji BABA ,  Takeumi KATO

IPC: H01L23/498 ,  H01L25/00 ,  H05K3/46 ,  H01L23/00 ,  H01L23/66 ,  H01L21/56 ,  H01L21/66 ,  H01L23/31 ,  H01L23/367

CPC classification number: H01L23/49838 ,  H01L21/56 ,  H01L22/14 ,  H01L23/3128 ,  H01L23/367 ,  H01L23/3675 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/50 ,  H01L23/66 ,  H01L24/48 ,  H01L24/49 ,  H01L24/85 ,  H01L25/00 ,  H01L25/50 ,  H01L2223/6611 ,  H01L2223/6616 ,  H01L2224/13111 ,  H01L2224/13116 ,  H01L2224/13139 ,  H01L2224/13147 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/45099 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/014 ,  H01L2924/1517 ,  H01L2924/15311 ,  H01L2924/16195 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19105 ,  H05K1/0225 ,  H05K1/0231 ,  H05K1/0253 ,  H05K3/46 ,  H01L2924/00012 ,  H01L2924/00

Abstract: A semiconductor device includes a wiring substrate including wiring layers, a semiconductor chip including electrode pads and mounted on the wiring substrate, and a first capacitor including a first electrode and a second electrode, and mounted on the wiring substrate. The wiring layers include a first wiring layer including a first terminal pad electrically connected with the first electrode of the first capacitor and a second terminal pad electrically connected with the second electrode of the first capacitor; and a second wiring layer on an inner side by one layer from the first wiring layer of the wiring substrate and including a first conductor pattern having a larger area than each of the first terminal pad and the second terminal pad. The first conductor pattern includes a first opening in a region overlapping with each of the first terminal pad and the second terminal pad in the second wiring layer.

公开(公告)号：US20180254252A1

公开(公告)日：2018-09-06

申请号：US15759211

申请日：2015-10-15

Applicant: Renesas Electronics Corporation

Inventor： Kazuyuki NAKAGAWA ,  Keita TSUCHIYA ,  Yoshiaki SATO ,  Shinji BABA

IPC: H01L23/64 ,  H01L23/00 ,  H01L23/16 ,  H01L23/367 ,  H01L23/498 ,  H01L21/48 ,  H01L21/66

CPC classification number: H01L23/642 ,  G01R31/2836 ,  H01G2/06 ,  H01G4/38 ,  H01G4/40 ,  H01L21/4853 ,  H01L21/4857 ,  H01L21/4871 ,  H01L22/12 ,  H01L23/12 ,  H01L23/16 ,  H01L23/36 ,  H01L23/3675 ,  H01L23/49822 ,  H01L23/49838 ,  H01L23/50 ,  H01L24/16 ,  H01L25/00 ,  H01L2224/16227 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2924/15311 ,  H01L2924/16195 ,  H01L2924/19041 ,  H01L2924/19103 ,  H01L2924/19105 ,  H01L2924/3511 ,  H05K1/0231 ,  H05K1/185 ,  H05K3/46

Abstract: A semiconductor device includes a wiring substrate including a first surface and a second surface opposite to the first surface, a semiconductor chip including a plurality of chip electrodes and mounted over the wiring substrate, a first capacitor arranged at a position overlapping with the semiconductor chip in plan view and incorporated in the wiring substrate, and a second capacitor arranged between the first capacitor and a peripheral portion of the wiring substrate in plan view. Also, the second capacitor is inserted in series connection into a signal transmission path through which an electric signal is input to or output from the semiconductor chip.