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公开(公告)号:US11296670B2
公开(公告)日:2022-04-05
申请号:US16750625
申请日:2020-01-23
Applicant: QUALCOMM Incorporated
Inventor: Jonghae Kim , Milind Shah , Periannan Chidambaram
Abstract: Impedance matching transceivers may include a tuning circuit to match the transceiver module impedance to the housing conditions. In some examples, the impedance matching is controlled by tuning-circuits that may be integrated into a transceiver module by using a fan-out package (FO PKG). One example of a tuning circuit may include a switch to isolate the parallel capacitors, such that when the switch is on or closed the parallel capacitors are active.
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公开(公告)号:US11239573B2
公开(公告)日:2022-02-01
申请号:US16886086
申请日:2020-05-28
Applicant: QUALCOMM Incorporated
Inventor: Milind Shah , Chin-Kwan Kim , Jaehyun Yeon , Rajneesh Kumar , Suhyung Hwang
Abstract: An antenna-in-package (AiP) module is described. The AiP module includes an antenna sub-module. The antenna sub-module is composed of a first package substrate including an antenna side surface having a first group of antennas placed along a first portion of the antenna side surface and a second group of antennas placed along a second portion of the antenna side surface. The first package substrate is composed of a non-linear portion between the first group of antennas and the second group of antennas. The AiP module includes an active circuit sub-module placed on an active side surface of the first package substrate opposite the first group of antennas or the second group of antennas on the antenna side surface of the first package substrate.
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公开(公告)号:US11689181B2
公开(公告)日:2023-06-27
申请号:US16884891
申请日:2020-05-27
Applicant: QUALCOMM Incorporated
Inventor: Jonghae Kim , Je-Hsiung Lan , Ranadeep Dutta , Milind Shah , Periannan Chidambaram
IPC: H03H9/05 , H01L25/04 , H03H9/02 , H03H9/145 , H03H9/64 , H10N30/02 , H10N30/87 , H10N30/88 , H03H3/02
CPC classification number: H03H9/058 , H01L25/04 , H03H3/02 , H03H9/02992 , H03H9/14544 , H03H9/64 , H10N30/02 , H10N30/875 , H10N30/883
Abstract: A package that includes a first filter comprising a first polymer, a substrate cap, a second filter comprising a second polymer frame, at least one interconnect, an encapsulation layer and a plurality of through encapsulation vias. The substrate cap is coupled to the first polymer frame such that a first void is formed between the substrate cap and the first filter. The second polymer frame is coupled to the substrate cap such that a second void is formed between the substrate cap and the second filter. The at least one interconnect is coupled to the first filter and the second filter. The encapsulation layer encapsulates the first filter, the substrate cap, the second filter, and the at least one interconnect. The plurality of through encapsulation vias coupled to the first filter.
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公开(公告)号:US11201127B2
公开(公告)日:2021-12-14
申请号:US16812882
申请日:2020-03-09
Applicant: QUALCOMM Incorporated
Inventor: Jonghae Kim , Milind Shah , Periannan Chidambaram
Abstract: A device that includes a first package and a second package coupled to the first package. The first package includes a first integrated device, a first encapsulation layer encapsulating the first integrated device, a plurality of vias traveling through the first encapsulation layer, a first redistribution portion comprising a first plurality of redistribution interconnects, wherein the first redistribution portion is coupled to the first encapsulation layer, and a first plurality of contacts coupled to the first integrated device. The second package includes a passive device, a second encapsulation layer encapsulating the passive device, a second redistribution portion comprising a second plurality of redistribution interconnects, wherein the second redistribution portion is coupled to the passive device and the second encapsulation layer, and a second plurality of contacts coupled to the passive device, wherein the second plurality of contacts is coupled to the first plurality of contacts from the first package.
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公开(公告)号:US12046545B2
公开(公告)日:2024-07-23
申请号:US17093090
申请日:2020-11-09
Applicant: QUALCOMM Incorporated
Inventor: Jonghae Kim , Milind Shah , Periannan Chidambaram
CPC classification number: H01L23/49833 , H01L21/481 , H01L21/56 , H01L23/3107 , H01L25/18 , H01L23/481 , H01L27/01
Abstract: A reconstituted substrate, a packaged assembly comprising a reconstituted substrate, and methods for fabricating a reconstituted substrate. An example reconstituted substrate generally includes multiple package-level substrates implemented with different substrate technologies and held together. An example method for fabricating a reconstituted substrate generally includes forming multiple package-level substrates implemented with different substrate technologies, arranging the multiple package-level substrates, and adding a material to hold the multiple package-level substrates together.
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公开(公告)号:US11670614B2
公开(公告)日:2023-06-06
申请号:US17061737
申请日:2020-10-02
Applicant: QUALCOMM Incorporated
Inventor: Jonghae Kim , Milind Shah , Periannan Chidambaram , Abdolreza Langari
CPC classification number: H01L24/29 , H01L21/565 , H01L23/3157 , H01L23/481 , H01L24/27 , H01L2924/01014 , H01L2924/1205 , H01L2924/14
Abstract: Certain aspects of the present disclosure generally relate to an integrated circuit assembly. One example integrated circuit assembly generally includes a first reconstituted assembly, a second reconstituted assembly, and a third reconstituted assembly. The first reconstituted assembly comprises at least one passive component and a first bonding layer. The second reconstituted assembly is disposed above the first reconstituted assembly and comprises one or more first semiconductor dies, a second bonding layer bonded to the first bonding layer of the first reconstituted assembly, and a third bonding layer. The third reconstituted assembly is disposed above the second reconstituted assembly and comprises one or more second semiconductor dies and a fourth bonding layer bonded to the third bonding layer of the second reconstituted assembly.
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公开(公告)号:US11417637B2
公开(公告)日:2022-08-16
申请号:US16864363
申请日:2020-05-01
Applicant: QUALCOMM Incorporated
Inventor: Jonghae Kim , Milind Shah , Periannan Chidambaram
Abstract: Certain aspects of the present disclosure generally relate to an integrated circuit package having a land-side capacitor electrically coupled to an embedded capacitor. One example integrated circuit package generally includes a package substrate having a first capacitor embedded therein, a semiconductor die disposed above the package substrate, and a second capacitor disposed below the package substrate and electrically coupled to the first capacitor.
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公开(公告)号:US11101228B1
公开(公告)日:2021-08-24
申请号:US16789863
申请日:2020-02-13
Applicant: QUALCOMM Incorporated
Inventor: Jonghae Kim , Milind Shah , Periannan Chidambaram
IPC: H01L23/00
Abstract: Aspects of the present disclosure provide an integrated circuit package having an inductive element with a magnetic core. An example integrated circuit package generally includes a semiconductor die, a redistribution layer, and a magnetic core. The semiconductor die includes a metal layer having first conductive traces and conductive pillars coupled to and extending from the metal layer. The redistribution layer is disposed below the semiconductor die and includes second conductive traces. A portion of the first conductive traces, a portion of the conductive pillars, and a portion of the second conductive traces are arranged to form an inductive element disposed below a portion of the semiconductor die. The magnetic core is disposed in the inductive element.
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公开(公告)号:US20170098634A1
公开(公告)日:2017-04-06
申请号:US15097719
申请日:2016-04-13
Applicant: QUALCOMM Incorporated
Inventor: Rajneesh Kumar , Chin-Kwan Kim , Milind Shah
CPC classification number: H01L25/105 , H01L21/568 , H01L23/552 , H01L23/66 , H01L24/19 , H01L25/0657 , H01L25/16 , H01L25/50 , H01L2224/04105 , H01L2224/12105 , H01L2224/16225 , H01L2224/16227 , H01L2224/73204 , H01L2225/1023 , H01L2225/1041 , H01L2225/1058 , H01L2225/1088 , H01L2924/15174 , H01L2924/15311 , H01L2924/181 , H01L2924/18162 , H01L2924/19105 , H04W4/00 , H04W4/80 , H01L2924/00012
Abstract: An integrated device that includes a printed circuit board (PCB) and a package on package (PoP) device coupled to the printed circuit board (PCB). The package on package (PoP) device includes a first package that includes a first electronic package component (e.g., first die) and a second package coupled to the first package. The integrated device includes a first encapsulation layer formed between the first package and the second package. The integrated device includes a second encapsulation layer that at least partially encapsulates the package on package (PoP) device. The integrated device is configured to provide cellular functionality, wireless fidelity functionality and Bluetooth functionality. In some implementations, the first encapsulation layer is separate from the second encapsulation layer. In some implementations, the second encapsulation layer includes the first encapsulation layer. The package on package (PoP) device includes a gap controller located between the first package and the second package.
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