知搜-全球专利检索

  1. Login
  2. Sign Up

Search Results

33 records (took 0.019 seconds)

    INTEGRATION OF VERTICAL GAN VARACTOR WITH HEMT
    12.
    发明申请
    INTEGRATION OF VERTICAL GAN VARACTOR WITH HEMT 有权

    公开(公告)号：US20210020790A1

    公开(公告)日：2021-01-21

    申请号：US16511093

    申请日：2019-07-15

    Applicant: QUALCOMM Incorporated

    Inventor： Gengming TAO ,  Xia LI ,  Bin YANG

    IPC: H01L29/93 ,  H01L29/778 ,  H01L29/66

    Abstract: Aspects generally relate to a P-N junction varactor that can be integrated with high electron mobility transistor (HEMT) in a single device or die. The varactor and HEMT are fabricated with the same materials forming various layers of the varactor and HEMT. Using the same material stack-up to form the varactor and HEMT can reduce the number of processing steps during the fabrication of the integrated varactor and HEMT device. The integrated varactor and HEMT device may be used for RF circuits, such as radio frequency front end (RFFE) devices for use in 5G.

    WAFER CARRIER FOR HANDLING AND TRANSPORTING A WAFER
    13.
    发明申请
    WAFER CARRIER FOR HANDLING AND TRANSPORTING A WAFER 审中-公开

    公开(公告)号：US20200381319A1

    公开(公告)日：2020-12-03

    申请号：US16696507

    申请日：2019-11-26

    Applicant: QUALCOMM Incorporated

    Inventor： Chenjie TANG ,  Gengming TAO ,  William Clinton Burling PEATMAN

    IPC: H01L23/12 ,  H01L21/677 ,  H01L21/67 ,  H01L21/68 ,  H01L21/66

    Abstract: A wafer carrier comprising a board, a frame and at least one bolt and nut combination. The board includes at least one vacuum cavity and at least one securing cavity. The frame is coupled to the board. The at least one bolt and nut combination is configured to secure the frame to the board. The board may include one or more metal layers. The frame may include a plurality of scattered frames or a disc shaped frame. The frame may comprise a cavity for the bolt travels through the frame. The wafer carrier may include a wafer located over the board, wherein the wafer is located between the board and the frame.

    PLANAR DOUBLE GATE SEMICONDUCTOR DEVICE
    15.
    发明申请
    PLANAR DOUBLE GATE SEMICONDUCTOR DEVICE 审中-公开

    公开(公告)号：US20190051750A1

    公开(公告)日：2019-02-14

    申请号：US15676494

    申请日：2017-08-14

    Applicant: QUALCOMM Incorporated

    Inventor： Xia LI ,  Bin YANG ,  Gengming TAO

    IPC: H01L29/78 ,  H01L29/66 ,  H01L29/16 ,  H01L27/092 ,  H01L21/8238

    Abstract: Certain aspects of the present disclosure generally relate to a semiconductor device. The semiconductor device generally includes a substrate, a channel disposed above the substrate, and a first dielectric layer disposed adjacent to a first side of the channel. The semiconductor device may also include a first non-insulative region disposed between the first dielectric layer and the substrate, and a second dielectric layer disposed adjacent to a second side of the channel, wherein the first dielectric layer and the second dielectric layer comprise high-k layers. In certain aspects, a second non-insulative region may be disposed above the second dielectric layer, and a third non-insulative region may be disposed adjacent to a third side of the channel.

    VERTICALLY STACKED MULTILAYER HIGH-DENSITY RRAM
    17.
    发明申请
    VERTICALLY STACKED MULTILAYER HIGH-DENSITY RRAM 有权

    公开(公告)号：US20210233959A1

    公开(公告)日：2021-07-29

    申请号：US16752288

    申请日：2020-01-24

    Applicant: QUALCOMM Incorporated

    Inventor： Bin YANG ,  Xia LI ,  Gengming TAO

    IPC: H01L27/24 ,  H01L45/00

    Abstract: Certain aspects of the present disclosure generally relate to a vertically stacked multilayer resistive random access memory (RRAM) and methods for fabricating such an RRAM. The vertically stacked multilayer RRAM generally includes a planar substrate layer and a plurality of metal-insulator-metal (MIM) stacks, each MIM stack structure of the plurality of MIM stacks comprising a plurality of MIM structures extending orthogonally above the planar substrate.

    COMPACT AND RELIABLE PHYSICAL UNCLONABLE FUNCTION DEVICES AND METHODS
    19.
    发明申请
    COMPACT AND RELIABLE PHYSICAL UNCLONABLE FUNCTION DEVICES AND METHODS 审中-公开

    公开(公告)号：US20190229933A1

    公开(公告)日：2019-07-25

    申请号：US15877630

    申请日：2018-01-23

    Applicant: QUALCOMM Incorporated

    Inventor： Xia LI ,  Seung Hyuk KANG ,  Bin YANG ,  Gengming TAO

    IPC: H04L9/32 ,  G06F11/10 ,  G06F21/31 ,  G06F3/06 ,  G11C13/00 ,  G11C29/52

    Abstract: In certain aspects, an apparatus comprises a plurality of PUF cells. Each PUF cell comprises a first transistor in series with a first loading resistive component and coupled to a common cross-coupled node and cross-coupled to a complementary common cross-coupled node, a second transistor in series with a second loading resistive component and coupled to the complementary common cross-coupled node and cross-coupled to the common cross-coupled node, a first pass-gate and a second pass-gate coupled to a bit line and the complementary bit line, respectively. The apparatus further comprises an auxiliary peripheral circuit coupled to the bit line, the complementary bit line, the common cross-coupled node, and the complementary common cross-coupled node. During activation, the selected PUF cell, together with the auxiliary peripheral circuit, forms a cross-coupled inverter pair and outputs a physical unclonable function value.

Patent Agency Ranking