公开(公告)号：US10163687B2

公开(公告)日：2018-12-25

申请号：US14861484

申请日：2015-09-22

Applicant: QUALCOMM Incorporated

Inventor： David Fraser Rae ,  Lizabeth Ann Keser ,  Reynante Tamunan Alvarado

IPC: H01L21/56 ,  H01L23/00 ,  H01L23/31 ,  H01L25/16 ,  H01L21/768 ,  H01L23/498 ,  H01L23/538 ,  H01L21/00

Abstract: A package may include a die proximate to a structure having a substrate with interconnects and a first component coupled to the interconnects. The die may be face up or face down. The package may include a first redistribution layer coupling the die to the interconnects of the structure and a mold compound covering the die and maybe the structure.

公开(公告)号：US09985010B2

公开(公告)日：2018-05-29

申请号：US14859316

申请日：2015-09-20

Applicant: QUALCOMM Incorporated

Inventor： David Fraser Rae ,  Lizabeth Ann Keser ,  Reynante Tamunan Alvarado

IPC: H01L23/538 ,  H01L25/16 ,  H01L21/311 ,  H01L21/31 ,  H01L21/48 ,  H01L21/56 ,  H01L23/00 ,  H01L23/498

CPC classification number: H01L25/16 ,  H01L21/31 ,  H01L21/31116 ,  H01L21/4846 ,  H01L21/561 ,  H01L21/568 ,  H01L23/49816 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/20 ,  H01L24/96 ,  H01L24/97 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/24137 ,  H01L2224/24195 ,  H01L2224/32225 ,  H01L2224/73267 ,  H01L2224/75 ,  H01L2224/83005 ,  H01L2224/83192 ,  H01L2224/92244 ,  H01L2224/97 ,  H01L2924/1431 ,  H01L2924/1434 ,  H01L2924/15153 ,  H01L2924/1815 ,  H01L2924/18162 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2224/83

Abstract: An integrated package may be manufactured in a die face up orientation with a component proximate to the attached die by creating a cavity in the mold compound during fabrication. The cavity is created with an adhesive layer on the bottom to hold a component such that the top surface of the component is co-planar with the top surface of the attached die. This may allow backside grinding to take place that will not damage the component because the top surface alignment between the attached die and the component prevents the depth of the cavity from extending into the portion of the package that is ground away.

公开(公告)号：US09379065B2

公开(公告)日：2016-06-28

申请号：US13969436

申请日：2013-08-16

Applicant: QUALCOMM Incorporated

Inventor： Lizabeth Ann Keser ,  Zhongping Bao ,  Reynante Tamunan Alvarado

IPC: H01L21/00 ,  H01L23/00 ,  H01L23/58 ,  H01L23/528 ,  H01L23/31 ,  H01L23/525

CPC classification number: H01L23/562 ,  H01L23/3114 ,  H01L23/525 ,  H01L23/5283 ,  H01L23/585 ,  H01L24/02 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/11 ,  H01L24/13 ,  H01L24/27 ,  H01L24/29 ,  H01L24/94 ,  H01L2224/02235 ,  H01L2224/0231 ,  H01L2224/02375 ,  H01L2224/0239 ,  H01L2224/024 ,  H01L2224/0401 ,  H01L2224/05008 ,  H01L2224/05022 ,  H01L2224/05569 ,  H01L2224/05572 ,  H01L2224/05647 ,  H01L2224/06179 ,  H01L2224/13007 ,  H01L2224/13022 ,  H01L2224/13024 ,  H01L2224/131 ,  H01L2224/94 ,  H01L2924/12042 ,  H01L2924/15788 ,  H01L2924/351 ,  H01L2924/00 ,  H01L2924/014 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/00012 ,  H01L2224/03 ,  H01L2224/11

Abstract: Some implementations provide a semiconductor device (e.g., die, wafer) that includes a substrate, metal layers and dielectric layers coupled to the substrate, a pad coupled to one of the several metal layers, a first metal redistribution layer coupled to the pad, an under bump metallization (UBM) layer coupled to the first metal redistribution layer. The semiconductor device includes several crack stopping structures configured to surround a bump area of the semiconductor device and a pad area of the semiconductor device. The bump area includes the UBM layer. The pad area includes the pad. In some implementations, at least one crack stopping structure includes a first metal layer and a first via. In some implementations, at least one crack stopping structure further includes a second metal layer, a second via, and a third metal layer. In some implementations, at least one crack stopping structure is an inverted pyramid crack stopping structure.

Abstract translation: 一些实施方案提供了一种半导体器件（例如，管芯，晶片），其包括衬底，耦合到衬底的金属层和电介质层，耦合到几个金属层中的一个的焊盘，耦合到焊盘的第一金属再分布层， 凸起下金属化（UBM）层，其耦合到第一金属再分配层。 半导体器件包括构造成围绕半导体器件的凸起区域和半导体器件的焊盘区域的几个裂纹停止结构。 凸块区域包括UBM层。 垫区包括垫。 在一些实施方案中，至少一个裂纹停止结构包括第一金属层和第一通孔。 在一些实施方案中，至少一个裂纹停止结构还包括第二金属层，第二通孔和第三金属层。 在一些实施方案中，至少一个裂纹停止结构是倒锥形裂纹停止结构。

公开(公告)号：US20150228594A1

公开(公告)日：2015-08-13

申请号：US14221582

申请日：2014-03-21

Applicant: QUALCOMM INCORPORATED

Inventor： Reynante Tamunan Alvarado ,  Ruey Kae Zang ,  Lizabeth Ann Keser

IPC: H01L23/00 ,  H01L23/48

CPC classification number: H01L24/06 ,  H01L23/3192 ,  H01L24/03 ,  H01L24/05 ,  H01L24/13 ,  H01L2224/034 ,  H01L2224/0361 ,  H01L2224/03622 ,  H01L2224/05078 ,  H01L2224/05094 ,  H01L2224/05095 ,  H01L2224/05096 ,  H01L2224/05097 ,  H01L2224/051 ,  H01L2224/05548 ,  H01L2224/05559 ,  H01L2224/0556 ,  H01L2224/05562 ,  H01L2224/05567 ,  H01L2224/05572 ,  H01L2224/056 ,  H01L2224/061 ,  H01L2224/13022 ,  H01L2224/13111 ,  H01L2224/13144 ,  H01L2224/1329 ,  H01L2224/133 ,  H01L2224/16227 ,  H01L2924/00014 ,  H01L2924/01082 ,  H01L2924/00012

Abstract: A semiconductor device is provided that has a redistribution layer with reduced resistance. The semiconductor device comprises a plurality of bonding pads on a substrate, a redistribution layer coupled to the bonding pads through a plurality of vias, a dielectric layer over the redistribution layer, that includes an opening that exposes a portion of the redistribution layer. The bonding pads are at least partially under the opening.

Abstract translation: 提供了具有减小的电阻的再分布层的半导体器件。 半导体器件包括在衬底上的多个接合焊盘，通过多个通孔耦合到接合焊盘的再分布层，再分布层上的介电层，其包括暴露再分布层的一部分的开口。 接合垫至少部分在开口下方。

公开(公告)号：US20150048517A1

公开(公告)日：2015-02-19

申请号：US13969436

申请日：2013-08-16

Applicant: QUALCOMM Incorporated

Inventor： Lizabeth Ann Keser ,  Zhongping Bao ,  Reynante Tamunan Alvarado

IPC: H01L23/00

CPC classification number: H01L23/562 ,  H01L23/3114 ,  H01L23/525 ,  H01L23/5283 ,  H01L23/585 ,  H01L24/02 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/11 ,  H01L24/13 ,  H01L24/27 ,  H01L24/29 ,  H01L24/94 ,  H01L2224/02235 ,  H01L2224/0231 ,  H01L2224/02375 ,  H01L2224/0239 ,  H01L2224/024 ,  H01L2224/0401 ,  H01L2224/05008 ,  H01L2224/05022 ,  H01L2224/05569 ,  H01L2224/05572 ,  H01L2224/05647 ,  H01L2224/06179 ,  H01L2224/13007 ,  H01L2224/13022 ,  H01L2224/13024 ,  H01L2224/131 ,  H01L2224/94 ,  H01L2924/12042 ,  H01L2924/15788 ,  H01L2924/351 ,  H01L2924/00 ,  H01L2924/014 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/00012 ,  H01L2224/03 ,  H01L2224/11

Abstract: Some implementations provide a semiconductor device (e.g., die, wafer) that includes a substrate, metal layers and dielectric layers coupled to the substrate, a pad coupled to one of the several metal layers, a first metal redistribution layer coupled to the pad, an under bump metallization (UBM) layer coupled to the first metal redistribution layer. The semiconductor device includes several crack stopping structures configured to surround a bump area of the semiconductor device and a pad area of the semiconductor device. The bump area includes the UBM layer. The pad area includes the pad. In some implementations, at least one crack stopping structure includes a first metal layer and a first via. In some implementations, at least one crack stopping structure further includes a second metal layer, a second via, and a third metal layer. In some implementations, at least one crack stopping structure is an inverted pyramid crack stopping structure.

Abstract translation: 一些实施方案提供了一种半导体器件（例如，管芯，晶片），其包括衬底，耦合到衬底的金属层和电介质层，耦合到几个金属层中的一个的焊盘，耦合到焊盘的第一金属再分布层， 凸起下金属化（UBM）层，其耦合到第一金属再分配层。 半导体器件包括构造成围绕半导体器件的凸起区域和半导体器件的焊盘区域的几个裂纹停止结构。 凸块区域包括UBM层。 垫区包括垫。 在一些实施方案中，至少一个裂纹停止结构包括第一金属层和第一通孔。 在一些实施方案中，至少一个裂纹停止结构还包括第二金属层，第二通孔和第三金属层。 在一些实施方案中，至少一个裂纹停止结构是倒锥形裂纹停止结构。