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公开(公告)号：US09261632B2
公开(公告)日：2016-02-16
申请号：US12652278
申请日：2010-01-05
CPC分类号： H01L33/60 , G02B5/1861 , G02B5/1871 , G02B19/0028 , G02B19/0061 , H01L33/105 , H01L33/52 , H01L33/58 , H01L2933/005 , H01L2933/0058 , H01L2933/0083
摘要： A light emitting diode device is described which includes at least one planar non-periodic high-index-contrast grating. The light emitting diode device includes a cavity formed between a reflective optical element and a transmissive optical element. One or both of the optical elements can be a planar non-periodic high-index-contrast grating. The transmissive optical element can be a collimating lens used to collimate incident beams of light while the reflective optical element can be a parabolic reflector used to reflect incident beams of light along a direction opposite to an incidence direction. A light emitter can be disposed within the cavity and can emit beams of light.
摘要翻译： 描述了包括至少一个平面非周期性高折射率对比度光栅的发光二极管器件。 发光二极管装置包括在反射光学元件和透射光学元件之间形成的空腔。 一个或两个光学元件可以是平面非周期性高折射率对比度光栅。 透射光学元件可以是用于准直入射光束的准直透镜，而反射光学元件可以是用于沿着与入射方向相反的方向反射入射光束的抛物面反射器。 光发射器可以设置在空腔内并且可以发射光束。
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公开(公告)号：US09008467B2
公开(公告)日：2015-04-14
申请号：US12262312
申请日：2008-10-31
CPC分类号： G02F1/025 , G02F2001/0157 , G02F2201/063 , G02F2202/36
摘要： An optical modulator includes a first layer that is transparent or semitransparent over a range of optical wavelengths; a modulation layer made from nanoparticles embedded in a matrix; a first electrode and a second electrode that create an electrical field that passes through the modulation layer. A method for forming a nanoparticle modulator includes obtaining and preparing a substrate; forming sub-layers on the substrate; forming a nanoparticle modulator layer, where the nanoparticle modulator layer is an electrical insulator and has a thickness of less than the wavelength of light the nanoparticle QCSE modulator is designed to modulate.
摘要翻译： 光调制器包括在一定范围的光波长上是透明或半透明的第一层; 由嵌入基质中的纳米颗粒制成的调制层; 产生通过调制层的电场的第一电极和第二电极。 形成纳米颗粒调制剂的方法包括获得和制备基材; 在基板上形成子层; 形成纳米颗粒调制剂层，其中纳米颗粒调节剂层是电绝缘体并且具有小于纳米颗粒QCSE调制器被设计为调制的光的波长的厚度。
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公开(公告)号：US08198706B2
公开(公告)日：2012-06-12
申请号：US12243853
申请日：2008-10-01
CPC分类号： H01L29/0665 , B82Y10/00 , H01L21/0237 , H01L21/02433 , H01L21/02521 , H01L21/02573 , H01L21/02603 , H01L21/02609 , H01L21/02645 , H01L21/02653 , H01L29/0673 , H01L29/0676 , H01L31/035281 , H01L31/03529 , Y02E10/50 , Y10S977/762 , Y10S977/778 , Y10S977/813
摘要： A method for making a multi-level nanowire structure includes establishing a first plurality of nanowires on a substrate surface, wherein at least some of the nanowires are i) aligned at a predetermined crystallographically defined angle with respect to the substrate surface, ii) aligned substantially perpendicular with respect to the substrate surface, or iii) combinations of i and ii. An insulating layer is established between the nanowires of the first plurality such that one of two opposed ends of at least some of the nanowires positioned i) at the predetermined crystallographically defined angle, ii) substantially perpendicular with respect to the substrate surface, or iii) combinations of i and ii is exposed. Regions are grown from each of the exposed ends, and such regions coalesce to form a substantially continuous layer on the insulating layer. A second plurality of nanowires is established on the substantially continuous layer.
摘要翻译： 制造多层纳米线结构的方法包括在衬底表面上建立第一多个纳米线，其中至少一些纳米线是i）相对于衬底表面以预定的晶体学限定的角度排列，ii）基本上对准 垂直于衬底表面，或iii）i和ii的组合。 在第一多个纳米线之间建立绝缘层，使得至少一些纳米线的两个相对端中的一个位于i）处于预定的晶体学限定的角度，ii）相对于衬底表面基本垂直，或iii） i和ii的组合被暴露。 区域从每个暴露端生长，并且这些区域聚结以在绝缘层上形成基本上连续的层。 在基本连续的层上建立第二多个纳米线。
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公开(公告)号：US20110095291A1
公开(公告)日：2011-04-28
申请号：US12910055
申请日：2010-10-22
申请人： Nathaniel Quitoriano
发明人： Nathaniel Quitoriano
CPC分类号： H01L21/02422 , C30B25/02 , C30B29/08 , H01L21/02532 , H01L21/02639 , H01L21/02653 , H01L27/153 , H01L31/1804 , Y02E10/547 , Y02P70/521
摘要： A method of growing high quality crystalline films on lattice-mismatched or amorphous layers is presented allowing semiconductor materials that would normally be subject to high stress and cracking to be employed allowing cost reductions and/or performance improvements in devices to be obtained. Catalysis of the growth of these films is based upon utilizing particular combinations of metals, materials, and structures to establish growth of the crystalline film from a predetermined location. The subsequent film growth occurring in one or two dimensions to cover a predetermined area of the amorphous or lattice-mismatched substrate. Accordingly the technique can be used to either cover a large area or provide tiles of crystalline material with or without crystalline film interconnections.
摘要翻译： 提出了在晶格失配或非晶层上生长高质量结晶膜的方法，允许通常采用高应力和开裂的半导体材料，从而可以获得要获得的器件的成本降低和/或性能改进。 这些膜的生长的催化基于利用金属，材料和结构的特定组合来建立晶体膜从预定位置的生长。 随后的膜生长以一维或二维发生，以覆盖非晶形或晶格失配衬底的预定区域。 因此，该技术可以用于覆盖大面积或提供具有或不具有结晶膜互连的结晶材料的瓦片。
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公开(公告)号：US20090189144A1
公开(公告)日：2009-07-30
申请号：US12243804
申请日：2008-10-01
CPC分类号： H01L31/101 , H01L21/02573 , H01L21/02603 , H01L21/02617 , H01L21/02645 , H01L27/14647 , Y10S977/932 , Y10S977/95 , Y10S977/953
摘要： A device disclosed herein includes a first layer, a second layer, and a first plurality of nanowires established between the first layer and the second layer. The first plurality of nanowires is formed of a first semiconductor material. The device further includes a third layer, and a second plurality of nanowires established between the second and third layers. The second plurality of nanowires is formed of a second semiconductor material having a bandgap that is the same as or different from a bandgap of the first semiconductor material.
摘要翻译： 本文公开的装置包括在第一层和第二层之间建立的第一层，第二层和第一多个纳米线。 第一多个纳米线由第一半导体材料形成。 该装置还包括第二层和第三层之间建立的第三层和第二组纳米线。 第二多个纳米线由具有与第一半导体材料的带隙相同或不同的带隙的第二半导体材料形成。
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公开(公告)号：US20080317406A1
公开(公告)日：2008-12-25
申请号：US11820310
申请日：2007-06-19
申请人： Charles Santori , David Fattal , Wei Wu , Robert Bicknell , Shih-Yuan Wang , R. Stanley Williams , Duncan Stewart , Nathaniel Quitoriano , Raymond Beausoleil
发明人： Charles Santori , David Fattal , Wei Wu , Robert Bicknell , Shih-Yuan Wang , R. Stanley Williams , Duncan Stewart , Nathaniel Quitoriano , Raymond Beausoleil
IPC分类号： G02B6/28
CPC分类号： H04B10/803 , G02B6/4206 , G02B6/43
摘要： An optical interconnect has a plurality of optical sources, a first lens configured to collimate optical beams from the plurality of optical sources, a second lens configured to refocus the optical beams, and a plurality of optical receivers configured to receive the refocused optical beams from the second lens.
摘要翻译： 光学互连具有多个光源，第一透镜被配置为准直来自多个光源的光束，配置成重新聚焦光束的第二透镜以及被配置为从所述光源接收重新聚焦的光束的多个光学接收器 第二个镜头。
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公开(公告)号：US09484197B2
公开(公告)日：2016-11-01
申请号：US12910055
申请日：2010-10-22
申请人： Nathaniel Quitoriano
发明人： Nathaniel Quitoriano
CPC分类号： H01L21/02422 , C30B25/02 , C30B29/08 , H01L21/02532 , H01L21/02639 , H01L21/02653 , H01L27/153 , H01L31/1804 , Y02E10/547 , Y02P70/521
摘要： A method of growing high quality crystalline films on lattice-mismatched or amorphous layers is presented allowing semiconductor materials that would normally be subject to high stress and cracking to be employed allowing cost reductions and/or performance improvements in devices to be obtained. Catalysis of the growth of these films is based upon utilizing particular combinations of metals, materials, and structures to establish growth of the crystalline film from a predetermined location. The subsequent film growth occurring in one or two dimensions to cover a predetermined area of the amorphous or lattice-mismatched substrate. Accordingly the technique can be used to either cover a large area or provide tiles of crystalline material with or without crystalline film interconnections.
摘要翻译： 提出了在晶格失配或非晶层上生长高质量结晶膜的方法，允许通常采用高应力和开裂的半导体材料，从而可以获得要获得的器件的成本降低和/或性能改进。 这些膜的生长的催化基于利用金属，材料和结构的特定组合来建立晶体膜从预定位置的生长。 随后的膜生长以一维或二维发生，以覆盖非晶形或晶格失配衬底的预定区域。 因此，该技术可以用于覆盖大面积或提供具有或不具有结晶膜互连的结晶材料的瓦片。
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公开(公告)号：US08768132B2
公开(公告)日：2014-07-01
申请号：US12253196
申请日：2008-10-16
IPC分类号： G02B6/10
CPC分类号： G02B6/136 , G02B2006/12097
摘要： A ridge waveguide with decreased optical losses from surface scattering includes a ridge waveguide with etched surfaces and an optical layer deposited on the ridge waveguide that substantially covers the etched surfaces. A method of reducing optical energy losses from scattering at etched surfaces of a ridge waveguide includes depositing a layer of optical material over the etched surfaces, the layer of optical material filling surface irregularities in the etched surfaces.
摘要翻译： 具有从表面散射减少的光损失的脊波导包括具有蚀刻表面的脊波导和沉积在脊波导上的基本上覆盖蚀刻表面的光学层。 降低脊波导蚀刻表面散射光能损失的方法包括在蚀刻表面上沉积光学材料层，该光学材料层填充蚀刻表面中的表面凹凸。
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公开(公告)号：US08129710B2
公开(公告)日：2012-03-06
申请号：US12262451
申请日：2008-10-31
申请人： Hans Cho , David Fattal , Nathaniel Quitoriano
发明人： Hans Cho , David Fattal , Nathaniel Quitoriano
IPC分类号： H01L33/00
CPC分类号： H01L33/18
摘要： A nanowire light emitting diode (LED) and method of emitting light employ a plasmonic mode. The nanowire LED includes a nanowire having a semiconductor junction, a shell layer coaxially surrounding the nanowire, and an insulating layer, which is plasmonically thin, isolating the shell layer from the nanowire. The shell layer supports a surface plasmon that couples to the semiconductor junction by an evanescent field. Light is generated in a vicinity of the semiconductor junction and the surface plasmon is coupled to the semiconductor junction during light generation. The coupling enhances one or both of an efficiency of light emission and a light emission rate of the LED. A method of making the nanowire LED includes forming the nanowire, providing the insulating layer on the surface of the nanowire, and forming the shell layer on the insulating layer in the vicinity of the semiconductor junction.
摘要翻译： 纳米线发光二极管（LED）和发光的方法采用等离子体激发模式。 纳米线LED包括具有半导体结的纳米线，同轴地围绕纳米线的壳层，以及等离子体薄的绝缘层，将壳层与纳米线隔离。 壳层支撑通过ev逝场耦合到半导体结的表面等离子体。 在半导体结附近产生光，并且在光产生期间，表面等离子体激元耦合到半导体结。 耦合增强了LED的发光效率和发光速率的一个或两个。 制造纳米线LED的方法包括形成纳米线，在纳米线的表面上提供绝缘层，并在半导体结附近的绝缘层上形成壳层。
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20.发明申请ROUNDED THREE-DIMENSIONAL GERMANIUM ACTIVE CHANNEL FOR TRANSISTORS AND SENSORS 失效用于晶体管和传感器的三维三维有源通道公开(公告)号：US20110006348A1
公开(公告)日：2011-01-13
申请号：US12501259
申请日：2009-07-10
IPC分类号： H01L29/423 , H01L21/336 , H01L29/78
CPC分类号： H01L29/423 , B82Y10/00 , G01N27/414 , H01L21/02532 , H01L21/02636 , H01L21/02667 , H01L29/0665 , H01L29/0673 , H01L29/125 , H01L29/205 , H01L29/66439 , H01L29/775 , H01L29/7854
摘要： A process is provided for fabricating rounded three-dimensional germanium active channels for transistors and sensors. For forming sensors, the process comprises providing a crystalline silicon substrate; depositing an oxide mask on the crystalline silicon substrate; patterning the oxide mask with trenches to expose linear regions of the silicon substrate; epitaxially grow germanium selectively in the trenches, seeded from the silicon wafer; optionally etching the SiO2 mask partially, so that the cross section resembles a trapezoid on a stem; and annealing at an elevated temperature. The annealing process forms the rounded channel. For forming transistors, the process further comprises depositing and patterning a gate oxide and gate electrode onto this structure to form the gate stack of a MOSFET device; and after patterning the gate, implanting dopants into the source and drain located on the parts of the germanium cylinder on either side of the gate line.
摘要翻译： 提供了一种用于制造用于晶体管和传感器的圆形三维锗活性通道的工艺。 对于形成传感器，该方法包括提供晶体硅衬底; 在所述晶体硅衬底上沉积氧化物掩模; 用沟槽图案化氧化物掩模以暴露硅衬底的线性区域; 在沟槽中选择性地外延生长锗，从硅晶片接种; 可选地部分地蚀刻SiO 2掩模，使得横截面类似于杆上的梯形; 并在高温退火。 退火过程形成圆形通道。 为了形成晶体管，该工艺还包括将栅极氧化物和栅电极沉积并图案化到该结构上以形成MOSFET器件的栅叠层; 并且在图案化栅极之后，将掺杂剂注入位于栅极线两侧的锗圆筒部分上的源极和漏极。
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