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公开(公告)号：US20050267625A1
公开(公告)日：2005-12-01
申请号：US11138266
申请日：2005-05-27
IPC分类号： G05B19/18 , G05B19/4063 , G05B19/414 , G06F19/00
CPC分类号： G05B19/4063 , G05B19/4142 , G05B2219/33155 , G05B2219/33166 , G05B2219/33226 , G05B2219/33228 , G05B2219/33239
摘要： A numerical controller and a servomotor control system, capable of axis control required in case of a communication failure in the control of servomotors driven by servo amplifiers connected to a plurality of serial buses. The numerical controller has a plurality of serial buses to which the numerical controller and a plurality of servo amplifiers are daisy-chain-connected and controls servomotors connected individually to the servo amplifiers. The device comprises a plurality of communication control circuits for detecting respective communication failures of the serial buses and selecting means for selecting whether or not to notify the other communication control circuits of a communication failure, if any, of any one of the communication control circuits detected thereby. In the control of the servomotors driven by the servo amplifiers connected to the serial buses, an output of a servo amplifier connected to a serial bus that suffers a communication failure is reduced to 0 so that outputs to the servo amplifiers connected to the remaining normal serial buses can be maintained.
摘要翻译： 一种数字控制器和伺服电动机控制系统，能够在由连接到多个串行总线的伺服放大器驱动的伺服电动机的控制中的通信故障的情况下进行轴控制。 数字控制器具有多个串行总线，数字控制器和多个伺服放大器被菊花链连接，并且控制单独连接到伺服放大器的伺服电机。 该装置包括用于检测串行总线的各个通信故障的多个通信控制电路以及用于选择是否通知检测到的通信控制电路中的任一通信控制电路的通信故障（如果有的话）的其他通信控制电路的选择装置 从而。 在由连接到串行总线的伺服放大器驱动的伺服电机的控制中，连接到串行总线的连接到通信故障的伺服放大器的输出减少到0，使得输出连接到剩余的正常串行 公共汽车可以维护。
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公开(公告)号：US07148647B2
公开(公告)日：2006-12-12
申请号：US11239167
申请日：2005-09-30
IPC分类号： G05B19/18 , G05B19/4062
CPC分类号： H02P23/03
摘要： An analog amplifier performs control of a motor at the speed in proportion to a speed instruction (analog voltage) outputted from a numerical control device. The speed instruction (analog value) is converted into a digital value by an A/D converter and is then sent to a CPU. When the CPU judges that the received digital value corresponding to the speed instruction deviates from a predetermined range, the CPU stops sending out an enable signal, and sends out an emergency stop signal. As a result, the CPU stops electric power supply to the analog amplifier, and also invalidates the speed instruction sent to the analog amplifier 20, thereby performing control to make the speed of the motor become “0”.
摘要翻译： 模拟放大器以与从数控装置输出的速度指令（模拟电压）成比例的速度进行电动机的控制。 速度指令（模拟值）由A / D转换器转换为数字值，然后发送到CPU。 当CPU判断出与速度指令相对应的接收数字值偏离预定范围时，CPU停止发出使能信号，发出紧急停止信号。 结果，CPU停止对模拟放大器的电力供给，并且使发送到模拟放大器20的速度指令无效，从而进行使电机的速度变为“0”的控制。
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13.发明申请公开(公告)号：US20050066258A1
公开(公告)日：2005-03-24
申请号：US10934352
申请日：2004-09-07
CPC分类号： G06F11/0745 , G06F11/0793 , H03M13/151 , H03M13/1575
摘要： An error decoding circuit comprises a syndrome computing circuit for computing a syndrome on a receive data, an error detecting circuit for detecting an error based on the syndrome, an error pattern computing circuit for computing an error pattern based on the syndrome, and an inverting circuit for performing an error correction of a receive data based on the computed error pattern. Only when there is an error in the receive data, based on the detection result of the error detecting circuit, a request signal for extension of a bus cycle is outputted to a bus master. On the other hand, if there is no error in the receive data, an inputted data is outputted to a data bus without correction. By so doing, the high speed operation of the data bus is executed.
摘要翻译： 误差解码电路包括用于计算接收数据上的校正子的校正子计算电路，用于基于该校正子检测误差的误差检测电路，用于基于该校正子计算误差模式的误差模式计算电路，以及反相电路 用于基于所计算的误差模式执行接收数据的纠错。 只有当接收数据出现错误时，基于检错电路的检测结果，将总线周期扩展的请求信号输出到总线主机。 另一方面，如果接收数据没有错误，则将输入的数据输出到数据总线而不进行校正。 通过这样做，执行数据总线的高速操作。
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公开(公告)号：US07432674B2
公开(公告)日：2008-10-07
申请号：US11366432
申请日：2006-03-03
IPC分类号： H02P5/46
CPC分类号： H03L7/08 , E05Y2400/30 , G05B19/414 , G05B2219/33094 , G05B2219/33215 , G05B2219/34001 , G05B2219/42186 , G05B2219/50218 , H04L12/40006 , H04L12/403 , H04L2012/4026
摘要： A transmission path delay is set in a shift setting register. A slave unit generates a PRE_ITP signal in response to a timing signal (ITP signal) issued by a master unit. The phase difference between this PRE_ITP signal and the ITP signal unique to the slave unit is loaded into a period modification counter. A timer corrects a reference value, outputs position/speed control period signals (SYN signals) and counts down the period modification counter with these SYN signals until the period modification counter reaches zero. Furthermore, the ITP signal unique to the slave unit is outputted every time a predetermined number of the SYN signals are outputted.
摘要翻译： 在移位设置寄存器中设置传输路径延迟。 从单元响应由主单元发出的定时信号（ITP信号）产生PRE_ITP信号。 该PRE_ITP信号和从单元特有的ITP信号之间的相位差被加载到周期修改计数器中。 定时器校正参考值，输出位置/速度控制周期信号（SYN信号），并使用这些SYN信号向周期修改计数器递减计数，直到周期修改计数器达到零。 此外，每当输出预定数量的SYN信号时，输出从属单元唯一的ITP信号。
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公开(公告)号：US20060197476A1
公开(公告)日：2006-09-07
申请号：US11366432
申请日：2006-03-03
IPC分类号： H02P5/00
CPC分类号： H03L7/08 , E05Y2400/30 , G05B19/414 , G05B2219/33094 , G05B2219/33215 , G05B2219/34001 , G05B2219/42186 , G05B2219/50218 , H04L12/40006 , H04L12/403 , H04L2012/4026
摘要： A transmission path delay is set in a shift setting register. A slave unit generates a PRE_ITP signal in response to a timing signal (ITP signal) issued by a master unit. The phase difference between this PRE_ITP signal and the ITP signal unique to the slave unit is loaded into a period modification counter. A timer corrects a reference value, outputs position/speed control period signals (SYN signals) and counts down the period modification counter with these SYN signals until the period modification counter reaches zero. Furthermore, the ITP signal unique to the slave unit is outputted every time a predetermined number of the SYN signals are outputted.
摘要翻译： 在移位设置寄存器中设置传输路径延迟。 从单元响应由主单元发出的定时信号（ITP信号）产生PRE_ITP信号。 该PRE_ITP信号和从单元特有的ITP信号之间的相位差被加载到周期修改计数器中。 定时器校正参考值，输出位置/速度控制周期信号（SYN信号），并使用这些SYN信号向周期修改计数器递减计数，直到周期修改计数器达到零。 此外，每当输出预定数量的SYN信号时，输出从属单元唯一的ITP信号。
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16.发明授权Method, system, and program for master and slave units connected in daisy chain wherein appended error code is transferred between the units 有权以菊花链连接的主单元和从单元的方法，系统和程序，其中附加的错误代码在单元之间传送公开(公告)号：US07653768B2
公开(公告)日：2010-01-26
申请号：US11844157
申请日：2007-08-23
申请人： Kazunari Aoyama , Kunitaka Komaki , Masahiro Miura
发明人： Kazunari Aoyama , Kunitaka Komaki , Masahiro Miura
IPC分类号： G06F3/00
CPC分类号： H04L1/0045 , H04L1/245 , H04L2001/0094 , H04L2001/0097
摘要： A data transfer method for connecting a master unit on an upstream side and a plurality of slave units on an downstream side in series with serial bus by a daisy chain system and transferring data having an appended error check code or error correction code between a data transmitter and a data receiver, the data transfer method including: transferring the data flowing in the serial bus in the slave unit from the data transmitter to the data receiver without performing an error check or error correction; performing an error check of the data in a circuit provided in the slave unit aside from a circuit in which the data flow; and informing a result of the error check to the master unit individually by the slave unit, which has performed the error check of the data.
摘要翻译： 一种数据传输方法，用于通过菊花链系统连接上游侧的主单元和与串行总线串联的下游侧的多个从单元，并在数据发送器之间传送具有附加的错误校验码或纠错码的数据 数据接收机，该数据传输方法包括：将来自从单元的串行总线中流动的数据从数据发送器传送到数据接收器，而不执行错误校验或纠错; 对从属单元中提供的电路中的数据执行错误检查，除了数据流的电路之外; 并通过执行了数据的错误检查的从单元向主机单独地通知错误检查的结果。
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公开(公告)号：US07519113B2
公开(公告)日：2009-04-14
申请号：US11037003
申请日：2005-01-19
申请人： Kazunari Aoyama , Minoru Nakamura , Masahiro Miura
发明人： Kazunari Aoyama , Minoru Nakamura , Masahiro Miura
IPC分类号： H04B3/46
摘要： Noise detection is performed by using the output of the phase comparator that the PLL comprises. The phase comparator outputs a signal that is based on the phase difference between the output of the voltage controlled oscillator and the reference signal. The phase difference reflects the effect of noise on the PLL and, in addition to the characteristics of the noise itself, such as the wave height value of the noise and the frequency component thereof, reflects the tolerance of the PLL to noise, whereby the level of risk that the system can actually be caused to malfunction can be judged.
摘要翻译： 通过使用PLL包括的相位比较器的输出来执行噪声检测。 相位比较器输出基于压控振荡器的输出与参考信号之间的相位差的信号。 相位差反映了噪声对PLL的影响，除了噪声本身的特性（例如噪声的波高值及其频率分量）外，还反映了PLL对噪声的容限， 可以判断系统实际上可能导致故障的风险。
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公开(公告)号：US07262728B2
公开(公告)日：2007-08-28
申请号：US11291907
申请日：2005-12-02
申请人： Kazunari Aoyama , Minoru Nakamura , Masahiro Miura
发明人： Kazunari Aoyama , Minoru Nakamura , Masahiro Miura
CPC分类号： G05B19/408 , G05B2219/33187 , G05B2219/37527 , G05B2219/45244
摘要： A pressure measured by a load cell is converted into a digital signal by an A/D converter provided in an analog interface, and is processed by a digital filter provided in the analog interface. A sensor signal processed in the digital filter is transferred to a controller 10 for industrial machinery every transfer cycle via an optical fiber. A digital sampling cycle by the A/D converter is set to be shorter than the transfer cycle.
摘要翻译： 由测力传感器测量的压力由模拟接口中提供的A / D转换器转换为数字信号，并由模拟接口中提供的数字滤波器处理。 在数字滤波器中处理的传感器信号经由光纤传送到每个传送周期的工业机械的控制器10。 A / D转换器的数字采样周期设置为短于传输周期。
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公开(公告)号：US20050157829A1
公开(公告)日：2005-07-21
申请号：US11037003
申请日：2005-01-19
申请人： Kazunari Aoyama , Minoru Nakamura , Masahiro Miura
发明人： Kazunari Aoyama , Minoru Nakamura , Masahiro Miura
摘要： Noise detection is performed by using the output of the phase comparator that the PLL comprises. The phase comparator outputs a signal that is based on the phase difference between the output of the voltage controlled oscillator and the reference signal. The phase difference reflects the effect of noise on the PLL and, in addition to the characteristics of the noise itself, such as the wave height value of the noise and the frequency component thereof, reflects the tolerance of the PLL to noise, whereby the level of risk that the system can actually be caused to malfunction can be judged.
摘要翻译： 通过使用PLL包括的相位比较器的输出来执行噪声检测。 相位比较器输出基于压控振荡器的输出与参考信号之间的相位差的信号。 相位差反映了噪声对PLL的影响，除了噪声本身的特性（例如噪声的波高值及其频率分量）外，还反映了PLL对噪声的容限， 可以判断系统实际上可能导致故障的风险。
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20.发明授权公开(公告)号：US07428686B2
公开(公告)日：2008-09-23
申请号：US10726561
申请日：2003-12-04
申请人： Kazunari Aoyama , Minoru Nakamura , Yutaka Sakai
发明人： Kazunari Aoyama , Minoru Nakamura , Yutaka Sakai
IPC分类号： H03M13/00
CPC分类号： H04L1/0045 , H04L1/0041 , H04L2001/0094 , H04L2001/0098
摘要： A controller has a plurality of modules connected to each other via buses. On the transmitter side of each module, detection/correction code generation circuit for address/command and detection/correction code generation circuits for each kind of data are switched over according to information to be transmitted by a transmitter selection circuit, and then the data is transmitted with ECC code attached. On the receiver side, a receiver selection circuit selectively switches over an error detection/correction circuit for address/command and error detection/correction circuits for each kind of data to detect and correct errors.
摘要翻译： 控制器具有通过总线相互连接的多个模块。 在每个模块的发送器侧，根据要由发送器选择电路发送的信息切换用于每种数据的用于地址/命令和检测/校正码生成电路的检测/校正码产生电路，然后数据是 发送带有ECC代码。 在接收机侧，接收机选择电路选择性地切换用于每种数据的地址/命令的错误检测/校正电路和错误检测/校正电路，以检测和校正错误。
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