知搜-全球专利检索

  1. Login
  2. Sign Up

Search Results

79 records (took 0.02 seconds)

    SYSTEM-ON-CHIP AND METHOD FOR PERFORMING DIAGNOSE DURING RUNTIME
    11.
    发明公开
    SYSTEM-ON-CHIP AND METHOD FOR PERFORMING DIAGNOSE DURING RUNTIME 审中-公开

    公开(公告)号：US20230244583A1

    公开(公告)日：2023-08-03

    申请号：US18299185

    申请日：2023-04-12

    Applicant: DEEPX CO., LTD.

    Inventor： Lok Won KIM

    IPC: G06F11/273 ,  G06N3/02

    CPC classification number: G06F11/273 ,  G06N3/02 ,  G06F2213/0038

    Abstract: A system on chip (SoC) for testing a component in a system during runtime includes a plurality of functional components; a system bus for allowing the plurality of functional components to communicate with each other; one or more wrappers, each connected to one of the plurality of functional components; and an in-system component tester (ICT). The ICT monitors, via the wrappers, states of the functional components; selects, as a component under test (CUT), at least one functional component in an idle state; tests, via the wrappers, the selected at least one functional component; interrupts the testing step with respect to the selected at least one functional component, based on a detection of a collision with an access from the system bus to the selected at least one functional component; and allows a connection of the at least one functional component to the system bus, based on the interrupting step.

    METHOD FOR GENERATING PROGRAMMABLE ACTIVATION FUNCTION AND APPARATUS USING THE SAME
    13.
    发明公开
    METHOD FOR GENERATING PROGRAMMABLE ACTIVATION FUNCTION AND APPARATUS USING THE SAME 审中-公开

    公开(公告)号：US20230169314A1

    公开(公告)日：2023-06-01

    申请号：US17750568

    申请日：2022-05-23

    Applicant: DEEPX CO., LTD.

    Inventor： Lok Won KIM ,  Ho Seung KIM ,  Hyung Jin CHUN

    IPC: G06N3/04

    CPC classification number: G06N3/0481

    Abstract: A method for programming an activation function is provided. The method includes generating segment data for segmenting the activation function; segmenting the activation function into a plurality of segments using the segment data; and approximating at least one segment of the plurality of segments as a programmable segment. An apparatus for performing the method may include a programmable activation function generator configured to generate segment data for segmenting an activation function; segment the activation function into a plurality of segments using the generated segment data; and approximate at least one segment of the plurality of segments as a programmable segment. By using segment data, various non-linear activation functions, particularly newly proposed or known activation functions with some modifications, can be programmed to be processable in hardware.

    METHOD FOR PROVIDING SHOPPING INFORMATION FOR INDIVIDUAL PRODUCTS AND ELECTRONIC DEVICE PERFORMING SAME
    14.
    发明申请
    METHOD FOR PROVIDING SHOPPING INFORMATION FOR INDIVIDUAL PRODUCTS AND ELECTRONIC DEVICE PERFORMING SAME 有权

    公开(公告)号：US20210110454A1

    公开(公告)日：2021-04-15

    申请号：US17129955

    申请日：2020-12-22

    Applicant: DEEPX CO., LTD.

    Inventor： Lok Won KIM

    IPC: G06Q30/06 ,  G06N3/08 ,  G06N3/04 ,  G06F16/9538 ,  G06K9/00 ,  H04N5/232 ,  G06K9/03 ,  G06K9/62

    Abstract: The present disclosure relates to a method for providing shopping information by product and an electronic device performing the same and, more particularly, to a method for providing shopping information by product using an AI recognition model obtained by machine learning of an artificial neural network, and an electronic device performing the same. A method for providing shopping information by product, according to an embodiment of the present disclosure, comprises: an image acquisition step in which a camera-associated app linked to a camera module acquires a product image through the camera module; a recognition step in which an AI recognition model obtained by machine learning of an artificial neural network receives the product image and recognizes product information; a transmission step in which a communication module transmits the product information to a server; a receiving step in which the communication module receives, from the server, shopping information corresponding to the product information; and a display step in which a display module displays the shopping information on a screen.

    NPU AND APPARATUS FOR TRANSCEIVING FEATURE MAP IN A BITSTREAM FORMAT
    15.
    发明公开
    NPU AND APPARATUS FOR TRANSCEIVING FEATURE MAP IN A BITSTREAM FORMAT 审中-公开

    公开(公告)号：US20240338937A1

    公开(公告)日：2024-10-10

    申请号：US18507373

    申请日：2023-11-13

    Applicant: DEEPX CO., LTD.

    Inventor： Lok Won KIM ,  Ha Joon YU

    IPC: G06V10/82 ,  G06V10/77

    CPC classification number: G06V10/82 ,  G06V10/7715

    Abstract: A neural processing unit (NPU) for decoding video or feature map is provided. The NPU may comprise at least one processing element (PE) to perform an inference using an artificial neural network. The at least one PE may be configured to receive and decode data included in a bitstream. The data included in the bitstream may comprise data of a base layer. Alternatively, the data included in the bitstream may comprise data of the base layer and data of at least one enhancement layer. The data of the base layer included in the bitstream may include a first feature map. The data of the at least one enhancement layer included in the bitstream may include a second feature map.

    NPU CAPABLE OF BEING TESTED DURING RUNTIME
    16.
    发明公开
    NPU CAPABLE OF BEING TESTED DURING RUNTIME 审中-公开

    公开(公告)号：US20240264226A1

    公开(公告)日：2024-08-08

    申请号：US18626451

    申请日：2024-04-04

    Applicant: DEEPX CO., LTD.

    Inventor： Lok Won KIM

    IPC: G01R31/317 ,  G06N3/02

    CPC classification number: G01R31/31701 ,  G01R31/31713 ,  G06N3/02

    Abstract: This disclosure proposes an inventive system capable of testing a component in the system during runtime. The system may comprise: a substrate; a plurality of functional components, of the plurality of functional components being mounted onto the substrate and including a circuitry; a system bus formed with electrically conductive pattern onto the substrate thereby allowing the plurality of functional components to communicate with each other; one or more wrappers, each of the one or more wrappers connected to one of the plurality of functional components; and an in-system component tester (ICT) configured to: select, as a component under test (CUT), at least one functional component, in an idle state, of the plurality of the functional components; and test, via the one or more test wrappers, the at least one functional component selected as the CUT.

    TECHNOLOGY FOR CONTROLLING PEAK POWER BY DIVIDING CLOCK
    18.
    发明公开
    TECHNOLOGY FOR CONTROLLING PEAK POWER BY DIVIDING CLOCK 审中-公开

    公开(公告)号：US20240211431A1

    公开(公告)日：2024-06-27

    申请号：US18601598

    申请日：2024-03-11

    Applicant: DEEPX CO., LTD.

    Inventor： Lok Won KIM ,  Seong Jin LEE ,  Jin Gun SONG

    IPC: G06F15/80 ,  G06F1/08

    CPC classification number: G06F15/80 ,  G06F1/08

    Abstract: A neural processing unit (NPU) is proposed. The NPU may comprise a first circuit configured to perform operations for an artificial neural network (ANN) model, and arranged for a plurality of processing elements (PE) groups including a plurality of PEs, and a second circuit configured to operate as a clock divider configured to generate a plurality of clock signals having different phases, respectively, by dividing a source clock signal and provide the plurality of clock signals to the plurality of PE groups. A first clock signal of the plurality of clock signals may be provided to a first PE group of the plurality of PE groups, and a second clock signal of the plurality of clock signals may be provided to a second PE group of the plurality of PE groups.

    SYSTEM-ON-CHIP FOR ARTIFICIAL NEURAL NETWORK BEING OPERATED ACCORDING TO DYNAMICALLY CALIBRATED PHASE OF CLOCK SIGNAL
    19.
    发明公开
    SYSTEM-ON-CHIP FOR ARTIFICIAL NEURAL NETWORK BEING OPERATED ACCORDING TO DYNAMICALLY CALIBRATED PHASE OF CLOCK SIGNAL 审中-公开

    公开(公告)号：US20240013039A1

    公开(公告)日：2024-01-11

    申请号：US18473777

    申请日：2023-09-25

    Applicant: DEEPX CO., LTD.

    Inventor： Seong Jin LEE ,  Jin Gun SONG ,  Lok Won KIM

    IPC: G06N3/063

    CPC classification number: G06N3/063

    Abstract: A system-on-chip (SoC) may comprise a semiconductor substrate; a first circuitry, disposed on the semiconductor substrate, provided for a first neural processing unit (NPU) configured to perform operations of an artificial neural network (ANN) model; a second circuitry, disposed on the semiconductor substrate, provided for a second NPU configured to perform operations of an ANN model; and a third circuitry, disposed on the semiconductor substrate, configured to generate a control signal to selectively output one or more clock signals, wherein each of the first NPU and the second NPU may include a plurality of processing elements (PEs), and the plurality of PEs may include an adder, a multiplier, and an accumulator, and wherein the one or more clock signals may include an original clock signal and one or more phase-delayed clock signals based on a phase of the original clock signal.

    NPU CAPABLE OF TESTING COMPONENT INCLUDING MEMORY DURING RUNTIME
    20.
    发明公开
    NPU CAPABLE OF TESTING COMPONENT INCLUDING MEMORY DURING RUNTIME 审中-公开

    公开(公告)号：US20230360720A1

    公开(公告)日：2023-11-09

    申请号：US18193351

    申请日：2023-03-30

    Applicant: DEEPX CO., LTD.

    Inventor： Lok Won KIM ,  Jeong Kyun YIM

    IPC: G11C29/00 ,  G11C29/10

    CPC classification number: G11C29/78 ,  G11C29/10

    Abstract: A neural processing unit (NPU) for testing a component during runtime is provided. The NPU may include a plurality of functional components including a first functional component and a second functional component. At least one of the plurality of functional components may be driven for calculation of an artificial neural network. Another one of the plurality of functional components may be selected as a component under test (CUT). A scan test may be performed on the at least one functional component selected as the CUT. A tester for detecting a defect of an NPU is also provided. The tester may include a component tester configured to communicate with at least one functional component of the NPU, select the at least one functional component as a CUT, and perform a scan test for the selected CUT.

Patent Agency Ranking