HIGH SELECTIVITY CRYOGENIC TUNGSTEN-BORON-CARBIDE ETCH

    公开(公告)号:US20250149337A1

    公开(公告)日:2025-05-08

    申请号:US18913143

    申请日:2024-10-11

    Abstract: A method of selectively etching a hardmask layer formed on a device substrate. The method includes supplying an etching gas mixture to a process region of a processing chamber, where a device substrate is disposed in the process region when the etching gas mixture is supplied to the process region, where the device substrate may include a substrate, at least one cavity formed in the substrate, and a hardmask layer formed over the at least one cavity and over the substrate. The method also includes providing radio frequency (rf) power to the etching gas mixture to form a plasma in the process region.

    INTRODUCTION OF METAL IN HARD MASK FOR HIGH ASPECT RATIO DEVICE PATTERNING

    公开(公告)号:US20240395561A1

    公开(公告)日:2024-11-28

    申请号:US18637181

    申请日:2024-04-16

    Abstract: A method for patterning a boron-containing hard mask includes patterning an oxide hard mask formed on a boron-containing hard mask, and patterning the boron-containing hard mask using the patterned oxide hard mask, wherein the oxide hard mask comprises silicon oxide (SiO2), the boron-containing hard mask is doped with one or more metal elements, and the patterning of the boron-containing hard mask comprises etching the boron-containing hard mask through openings of the patterned oxide hard mask using an etching gas mixture comprising chlorine (Cl2), hydrogen bromide (HBr), and oxygen (O2).

    SPACER PATTERNING PROCESS WITH FLAT TOP PROFILE

    公开(公告)号:US20240162057A1

    公开(公告)日:2024-05-16

    申请号:US18379048

    申请日:2023-10-11

    Inventor: Chao LI Gene LEE

    CPC classification number: H01L21/67069 H01L21/02126 H01L21/0234

    Abstract: A method for spacer patterning includes performing a deposition process, the deposition process comprising conformally depositing an over layer over a spacer layer as deposited on top surfaces of a patterned mandrel layer and on sidewalls of the patterned mandrel layer, and performing an etch process using a fluorine containing etching gas. The etch process includes a post-deposition breakthrough process, removing portions of the over layer on the top surfaces of the patterned mandrel layer, and a main-etch process, removing shoulder portions of the over layer and shoulder portions of the spacer layer.

    UNDERLAYER FILM FOR SEMICONDUCTOR DEVICE FORMATION

    公开(公告)号:US20220189771A1

    公开(公告)日:2022-06-16

    申请号:US17157548

    申请日:2021-01-25

    Abstract: A structure includes an underlayer formed on a substrate, a mandrel layer formed on the underlayer, and a spacer layer formed on the mandrel layer. The underlayer includes a first material, and the spacer layer includes a second material. The first material is resistant to etching gases used in a first etch process to remove portions of the spacer layer and a second etch process to remove the mandrel layer.

    SELECTIVE ANISOTROPIC METAL ETCH
    16.
    发明申请

    公开(公告)号:US20220068661A1

    公开(公告)日:2022-03-03

    申请号:US17389119

    申请日:2021-07-29

    Abstract: A method of patterning a substrate is provided. The method includes modifying a surface of a metal-containing layer formed over a substrate positioned in a processing region of a processing chamber by exposing the surface of the metal-containing layer to plasma effluents of a chlorine-containing gas precursor and an oxygen-containing gas precursor to form a modified surface of the metal-containing layer. The method further includes directing plasma effluents of an inert gas precursor towards the modified surface of the metal-containing layer. The plasma effluents of the inert gas precursor are directed by applying a bias voltage to a substrate support holding the substrate. The method further includes anisotropically etching the modified surface of the metal-containing layer with the plasma effluents of the inert gas precursor to form a first recess having a first sidewall in the metal-containing layer.

    METHODS FOR ETCHING A HARDMASK LAYER
    17.
    发明申请

    公开(公告)号:US20190221441A1

    公开(公告)日:2019-07-18

    申请号:US16245251

    申请日:2019-01-10

    CPC classification number: H01L21/31122 H01L21/31144

    Abstract: Methods for etching a hardmask layer to transfer features into a material layer using an etch process are provided. The methods described herein advantageously facilitate profile and dimension control of features through a proper sidewall and bottom management scheme during the hardmask open process. In one embodiment, a method for etching a hardmask layer to form features in the hardmask layer includes supplying an etching gas mixture onto a substrate to etch an exposed portion of a hardmask layer exposed by a patterned photoresist layer disposed on the substrate, switching the etching gas mixture to a deposition gas mixture comprising a silicon containing gas to form a passivation layer on sidewalls of the hardmask layer and forming openings in the hardmask layer.

    METHODS FOR HIGH TEMPERATURE ETCHING A MATERIAL LAYER USING PROTECTION COATING

    公开(公告)号:US20180025914A1

    公开(公告)日:2018-01-25

    申请号:US15216948

    申请日:2016-07-22

    Abstract: Methods for etching a bottom anti-reflective coating (BARC) and/or an anti-reflective coating (ARC) and/or a dielectric anti-reflective coating (DARC) to form high aspect ratio features using an etch process are provided. The methods described herein advantageously facilitate profile and dimension control of features with high aspect ratios through a proper sidewall and bottom management scheme during the bottom anti-reflective coating (BARC) and/or an anti-reflective coating (ARC) and/or a dielectric anti-reflective coating (DARC) open process. In one embodiment, a method for etching a dielectric anti-reflective coating (DARC) layer to form features in the DARC layer includes supplying an etching gas mixture onto a DARC layer disposed on a substrate, wherein the substrate is disposed on a substrate support pedestal assembly disposed in a processing chamber, controlling a temperature of the substrate support pedestal assembly greater than 110 degrees Celsius, and etching the DARC layer disposed on the substrate.

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