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公开(公告)号：US11269006B2
公开(公告)日：2022-03-08
申请号：US17062225
申请日：2020-10-02
Inventor： Edward John Coyne , Alan J. O'Donnell , Shaun Bradley , David Aherne , David Boland , Thomas G. O'Dwyer , Colm Patrick Heffernan , Kevin B. Manning , Mark Forde , David J. Clarke , Michael A. Looby
Abstract: The disclosed technology generally relates to integrated circuit devices with wear out monitoring capability. An integrated circuit device includes a wear-out monitor device configured to record an indication of wear-out of a core circuit separated from the wear-out monitor device, wherein the indication is associated with localized diffusion of a diffusant within the wear-out monitor device in response to a wear-out stress that causes the wear-out of the core circuit.
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12.发明申请公开(公告)号：US20250030237A1
公开(公告)日：2025-01-23
申请号：US18679379
申请日：2024-05-30
Inventor： David J. Clarke , Alan J. O'Donnell , Shaun Stephen Bradley , Stephen Denis Heffernan , Patrick Martin McGuinness , Padraig L. Fitzgerald , Edward John Coyne , Michael P. Lynch , John Anthony Cleary , John Ross Wallrabenstein , Paul Joseph Maher , Andrew Christopher Linehan , Gavin Patrick Cosgrave , Michael James Twohig , Jan Kubik , Jochen Schmitt , David Aherne , Mary McSherry , Anne M. McMahon , Stanislav Jolondcovschi , Cillian Burke
Abstract: Apparatuses including spark gap structures for electrical overstress (EOS) monitoring or protection, and associated methods, are disclosed. In an aspect, a vertical spark gap device includes a substrate having a horizontal main surface and a plurality of pairs of conductive layers over the horizontal main surface. Different ones of the pairs are separated by different vertical distances such that each pair serves as an arcing electrode pair and different ones of the arcing electrode pairs are configured to arc discharge at different voltages.
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公开(公告)号：US20240405519A1
公开(公告)日：2024-12-05
申请号：US18679364
申请日：2024-05-30
Inventor： David J. Clarke , Alan J. O'Donnell , Shaun Bradley , Stephen Denis Heffernan , Patrick Martin McGuinness , Padraig L. Fitzgerald , Edward John Coyne , Michael P. Lynch , John Anthony Cleary , John Ross Wallrabenstein , Paul Joseph Maher , Andrew Christopher Linehan , Gavin Patrick Cosgrave , Michael James Twohig , Jan Kubik , Jochen Schmitt , David Aherne , Mary McSherry , Anne M. McMahon , Stanislav Jolondcovschi , Cillian Burke
Abstract: Apparatuses including spark gap structures for electrical overstress (EOS) monitoring or protection, and associated methods, are disclosed. In an aspect, a vertical spark gap device includes a substrate having a horizontal main surface, a first conductive layer and a second conductive layer each extending over the substrate and substantially parallel to the horizontal main surface while being separated in a vertical direction crossing the horizontal main surface. One of the first and second conductive layers is electrically connected to a first voltage node and the other of the first and second conductive layers is electrically connected to a second voltage node. The first and second conductive layers serve as one or more arcing electrode pairs and have overlapping portions configured to generate one or more arc discharges extending generally in the vertical direction in response to an EOS voltage signal received between the first and second voltage nodes.
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14.发明公开公开(公告)号：US20230375600A1
公开(公告)日：2023-11-23
申请号：US18317806
申请日：2023-05-15
Inventor： David J. Clarke , Stephen Denis Heffernan , Nijun Wei , Alan J. O'Donnell , Patrick Martin McGuinness , Shaun Bradley , Edward John Coyne , David Aherne , David M. Boland
IPC: G01R19/165 , G01R31/00 , G01R31/28 , H02H9/04 , H01L27/02 , H01L23/60 , H01L23/62 , H01L23/525 , H02H9/00
CPC classification number: G01R19/16504 , G01R31/002 , G01R31/2832 , G01R31/2856 , H02H9/042 , H01L27/0288 , H01L23/60 , H01L23/62 , H01L23/5256 , H02H9/00
Abstract: The disclosed technology generally relates to electrical overstress protection devices, and more particularly to electrical overstress monitoring devices for detecting electrical overstress events in semiconductor devices. In one aspect, an electrical overstress monitor and/or protection device includes a two different conductive structures configured to electrically arc in response to an EOS event and a sensing circuit configured to detect a change in a physical property of the two conductive structures caused by the EOS event. The two conductive structures have facing surfaces that have different shapes;
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公开(公告)号：US20230221360A1
公开(公告)日：2023-07-13
申请号：US18188363
申请日：2023-03-22
Inventor： Alan J. O'Donnell , David Aherne , Javier Alejandro Salcedo , David J. Clarke , John A. Cleary , Patrick Martin McGuinness , Albert C. O'Grady
CPC classification number: H02J7/00712 , H02J7/0048 , H02J7/00032 , H02J7/0013 , H02J7/0029 , G08B21/185
Abstract: Aspects of this disclosure relate to detecting and recording information associated with electrical overstress (EOS) events, such as electrostatic discharge (ESD) events. For example, in one embodiment, an apparatus includes an electrical overstress protection device, a detection circuit configured to detect an occurrence of the EOS event, and a memory configured to store information indicative of the EOS event.
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Patent Agency Ranking
公开(公告)号：US11686763B2
公开(公告)日：2023-06-27
申请号：US17652857
申请日：2022-02-28
Inventor： Edward John Coyne , Alan J. O'Donnell , Shaun Bradley , David Aherne , David Boland , Thomas G. O'Dwyer , Colm Patrick Heffernan , Kevin B. Manning , Mark Forde , David J. Clarke , Michael A. Looby
CPC classification number: G01R31/2879 , G01N27/041 , G01R31/2874
Abstract: The disclosed technology generally relates to integrated circuit devices with wear out monitoring capability. An integrated circuit device includes a wear-out monitor device configured to record an indication of wear-out of a core circuit separated from the wear-out monitor device, wherein the indication is associated with localized diffusion of a diffusant within the wear-out monitor device in response to a wear-out stress that causes the wear-out of the core circuit.
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公开(公告)号：US11372030B2
公开(公告)日：2022-06-28
申请号：US16893874
申请日：2020-06-05
Inventor： David J. Clarke , Stephen Denis Heffernan , Alan J. O'Donnell , Patrick M. McGuinness
IPC: G01R19/165 , H01L23/60 , G01R31/00 , H01L27/02 , G01R31/28 , G01N25/04 , H01L23/525 , H01L23/62 , H01L25/065
Abstract: The disclosed technology generally relates to electrical overstress protection devices, and more particularly to electrical overstress monitoring devices for detecting electrical overstress events in semiconductor devices. In one aspect, a device configured to monitor electrical overstress (EOS) events includes a pair of spaced conductive structures configured to electrically arc in response to an EOS event, wherein the spaced conductive structures are formed of a material and have a shape such that arcing causes a detectable change in shape of the spaced conductive structures, and wherein the device is configured such that the change in shape of the spaced conductive structures is detectable to serve as an EOS monitor.
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公开(公告)号：US20220082605A1
公开(公告)日：2022-03-17
申请号：US17456307
申请日：2021-11-23
Inventor： Alan J. O'Donnell , David Aherne , Javier Alejandro Salcedo , David J. Clarke , John A. Cleary , Patrick Martin McGuinness , Albert C. O'Grady
Abstract: Aspects of this disclosure relate to detecting and recording information associated with electrical overstress (EOS) events, such as electrostatic discharge (ESD) events. For example, in one embodiment, an apparatus includes an electrical overstress protection device, a detection circuit configured to detect an occurrence of the EOS event, and a memory configured to store information indicative of the EOS event.
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公开(公告)号：US20240405517A1
公开(公告)日：2024-12-05
申请号：US18679348
申请日：2024-05-30
Inventor： David J. Clarke , Alan J. O'Donnell , Shaun Bradley , Stephen Denis Heffernan , Patrick Martin McGuinness , Padraig L. Fitzgerald , Edward John Coyne , Michael P. Lynch , John Anthony Cleary , John Ross Wallrabenstein , Paul Joseph Maher , Andrew Christopher Linehan , Gavin Patrick Cosgrave , Michael James Twohig , Jan Kubik , Jochen Schmitt , David Aherne , Mary McSherry , Anne M. McMahon , Stanislav Jolondcovschi , Cillian Burke
Abstract: Apparatuses including spark gap structures for electrical overstress (EOS) monitoring or protection, and associated methods, are disclosed. In an aspect, a spark gap array includes a sheet resistor and an array of arcing electrode pairs formed over a substrate. The array of arcing electrode pairs includes first arcing electrodes formed on the sheet resistor and a second arcing electrode arranged as a sheet formed over the first arcing electrodes and separated from the first arcing electrodes by an arcing gap. The first arcing electrodes and second arcing electrode are electrically connected to first and second voltage nodes, respectively, and the arcing electrode pairs are configured to generate arc discharges in response to an EOS voltage signal received between the first and second voltage nodes.
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公开(公告)号：US20230366924A1
公开(公告)日：2023-11-16
申请号：US18318506
申请日：2023-05-16
Inventor： Edward John Coyne , Alan J. O'Donnell , Shaun Bradley , David Aherne , David Boland , Thomas G. O'Dwyer , Colm Patrick Heffernan , Kevin B. Manning , Mark Forde , David J. Clarke , Michael A. Looby
CPC classification number: G01R31/2879 , G01R31/2874 , G01N27/041
Abstract: The disclosed technology generally relates to integrated circuit devices with wear out monitoring capability. An integrated circuit device includes a wear-out monitor device configured to record an indication of wear-out of a core circuit separated from the wear-out monitor device, wherein the indication is associated with localized diffusion of a diffusant within the wear-out monitor device in response to a wear-out stress that causes the wear-out of the core circuit.
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