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    SEMICONDUCTOR DEVICE CONFIGURED FOR GATE DIELECTRIC MONITORING
    1.
    发明申请
    SEMICONDUCTOR DEVICE CONFIGURED FOR GATE DIELECTRIC MONITORING 有权

    公开(公告)号：US20210072304A1

    公开(公告)日：2021-03-11

    申请号：US16996458

    申请日：2020-08-18

    Applicant: Analog Devices International Unlimited Company

    Inventor： Edward John Coyne ,  John P. Meskell ,  Colm Patrick Heffernan ,  Mark Forde ,  Shane Geary

    IPC: G01R31/26 ,  H01L27/07 ,  H01L29/735 ,  H01L29/10 ,  H01L29/78

    Abstract: The disclosed technology relates generally to semiconductor devices, and more particularly to semiconductor devices including a metal-oxide-semiconductor (MOS) transistor and are configured for accelerating and monitoring degradation of the gate dielectric of the MOS transistor. In one aspect, a semiconductor device configured with gate dielectric monitoring capability comprises a metal-oxide-semiconductor (MOS) transistor including a source, a drain, a gate, and a backgate region formed in a semiconductor substrate. The semiconductor device additionally comprises a bipolar junction transistor (BJT) including a collector, a base, and an emitter formed in the semiconductor substrate, wherein the backgate region of the MOS transistor serves as the base of the BJT and is independently accessible for activating the BJT. The MOS transistor and the BJT are configured to be concurrently activated by biasing the backgate region independently from the source of the MOS transistor, such that the base of the BJT injects carriers of a first charge type into the backgate region of the MOS transistor, where the first charge type is opposite charge type to channel current carriers.

    SEMICONDUCTOR DEVICE CONFIGURED FOR GATE DIELECTRIC MONITORING
    2.
    发明申请
    SEMICONDUCTOR DEVICE CONFIGURED FOR GATE DIELECTRIC MONITORING 有权

    公开(公告)号：US20250004034A1

    公开(公告)日：2025-01-02

    申请号：US18734307

    申请日：2024-06-05

    Applicant: Analog Devices International Unlimited Company

    Inventor： Edward John Coyne ,  John P. Meskell ,  Colm Patrick Heffernan ,  Mark Forde ,  Shane Geary

    IPC: G01R31/26 ,  H01L27/07 ,  H01L29/10 ,  H01L29/735 ,  H01L29/78

    Abstract: The disclosed technology relates generally to semiconductor devices, and more particularly to semiconductor devices including a metal-oxide-semiconductor (MOS) transistor and are configured for accelerating and monitoring degradation of the gate dielectric of the MOS transistor. In one aspect, a semiconductor device configured with gate dielectric monitoring capability comprises a metal-oxide-semiconductor (MOS) transistor including a source, a drain, a gate, and a backgate region formed in a semiconductor substrate. The semiconductor device additionally comprises a bipolar junction transistor (BJT) including a collector, a base, and an emitter formed in the semiconductor substrate, wherein the backgate region of the MOS transistor serves as the base of the BJT and is independently accessible for activating the BJT. The MOS transistor and the BJT are configured to be concurrently activated by biasing the backgate region independently from the source of the MOS transistor, such that the base of the BJT injects carriers of a first charge type into the backgate region of the MOS transistor, where the first charge type is opposite charge type to channel current carriers.

    Semiconductor device configured for gate dielectric monitoring
    5.
    发明授权
    Semiconductor device configured for gate dielectric monitoring 有权

    公开(公告)号：US12032014B2

    公开(公告)日：2024-07-09

    申请号：US16996458

    申请日：2020-08-18

    Applicant: Analog Devices International Unlimited Company

    Inventor： Edward John Coyne ,  John P. Meskell ,  Colm Patrick Heffernan ,  Mark Forde ,  Shane Geary

    IPC: G01R31/26 ,  H01L27/07 ,  H01L29/10 ,  H01L29/735 ,  H01L29/78

    CPC classification number: G01R31/2608 ,  H01L27/0722 ,  H01L29/1095 ,  H01L29/735 ,  H01L29/7816

    Abstract: The disclosed technology relates generally to semiconductor devices, and more particularly to semiconductor devices including a metal-oxide-semiconductor (MOS) transistor and are configured for accelerating and monitoring degradation of the gate dielectric of the MOS transistor. In one aspect, a semiconductor device configured with gate dielectric monitoring capability comprises a metal-oxide-semiconductor (MOS) transistor including a source, a drain, a gate, and a backgate region formed in a semiconductor substrate. The semiconductor device additionally comprises a bipolar junction transistor (BJT) including a collector, a base, and an emitter formed in the semiconductor substrate, wherein the backgate region of the MOS transistor serves as the base of the BJT and is independently accessible for activating the BJT. The MOS transistor and the BJT are configured to be concurrently activated by biasing the backgate region independently from the source of the MOS transistor, such that the base of the BJT injects carriers of a first charge type into the backgate region of the MOS transistor, where the first charge type is opposite charge type to channel current carriers.

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