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101.发明申请公开(公告)号：US20190097742A1
公开(公告)日：2019-03-28
申请号：US16200319
申请日：2018-11-26
Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE , R&DB FOUNDATION, KOREA MARITIME AND OCEAN UNIVERSITY
Inventor： Sung-Ik PARK , Sun-Hyoung KWON , Jeong-Chang KIM , Jae-Young LEE , Heung-Mook KIM , Nam-Ho HUR
Abstract: A broadcast signal transmission apparatus and method using layered division multiplexing are disclosed. A broadcast signal transmission apparatus according to an embodiment of the present invention includes a combiner configured to generate a multiplexed signal by combining a core layer signal and an enhanced layer signal at different power levels; a power normalizer configured to reduce the power of the multiplexed signal to a power level corresponding to the core layer signal; a time interleaver configured to generate a time-interleaved signal by performing interleaving that is applied to both the core layer signal and the enhanced layer signal; a frame builder configured to generate a broadcast signal frame using the time-interleaved signal; and an orthogonal frequency division multiplexing (OFDM) transmitter configured to generate a pilot signal that is shared by a core layer corresponding to the core layer signal and an enhanced layer corresponding to the enhanced layer signal.
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102.发明申请公开(公告)号：US20180375601A1
公开(公告)日：2018-12-27
申请号：US15780018
申请日：2017-01-04
Inventor： Sung-Ik PARK , Sun-Hyoung KWON , Jae-Young LEE , Heung-Mook KIM , Nam-Ho HUR
CPC classification number: H04H20/67 , H04H20/31 , H04H20/71 , H04H20/72 , H04H60/44 , H04H60/73 , H04J11/004 , H04L1/0041 , H04L1/0045 , H04L1/0057 , H04L1/0065 , H04L1/0071 , H04L27/2605 , H04L27/2613 , H04L27/2626 , H04L27/2627 , H04L69/323 , H04W52/322 , H04W52/346
Abstract: An apparatus for transmitting broadcasting signal using transmitter identification scaled by 4-bit injection level code and method using the same are disclosed. An apparatus for transmitting broadcasting signal according to an embodiment of the present invention includes a waveform generator configured to generate a host broadcasting signal; a transmitter identification signal generator configured to generate a transmitter identification signal for identifying a transmitter, the transmitter identification signal scaled by an injection level code; and a combiner configured to inject the transmitter identification signal into the host broadcasting signal in a time domain so that the transmitter identification signal is transmitted synchronously with the host broadcasting signal.
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103.发明申请公开(公告)号：US20180191379A1
公开(公告)日：2018-07-05
申请号：US15907064
申请日：2018-02-27
Inventor： Sung-Ik PARK , Sun-Hyoung KWON , Jae-Young LEE , Heung-Mook KIM , Nam-Ho HUR
CPC classification number: H03M13/1165 , H03M13/255 , H03M13/2792 , H03M13/616 , H03M13/6552 , H04L1/0041 , H04L1/0042 , H04L1/0057 , H04L1/0071 , H04L27/3422
Abstract: A modulator and a modulation method using a non-uniform 16-symbol signal constellation are disclosed. The modulator includes a memory and a processor. The memory receives a codeword corresponding to a low-density parity check (LDPC) code having a code rate of 4/15. The processor maps the codeword to 16 symbols of the non-uniform 16-symbol signal constellation on a 4-bit basis.
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104.发明申请公开(公告)号：US20180191378A1
公开(公告)日：2018-07-05
申请号：US15907025
申请日：2018-02-27
Inventor： Sung-Ik PARK , Heung-Mook KIM , Sun-Hyoung KWON , Nam-Ho HUR
CPC classification number: H03M13/1185 , H03M13/1102 , H03M13/1105 , H03M13/116 , H03M13/1165 , H03M13/255 , H03M13/616 , H04L1/0041 , H04L1/0043 , H04L1/0057 , H04L1/0065
Abstract: A low density parity check (LDPC) encoder, an LDPC decoder, and an LDPC encoding method are disclosed. The LDPC encoder includes first memory, second memory, and a processor. The first memory stores an LDPC codeword having a length of 64800 and a code rate of 5/15. The second memory is initialized to 0. The processor generates the LDPC codeword corresponding to information bits by performing accumulation with respect to the second memory using a sequence corresponding to a parity check matrix (PCM).
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公开(公告)号：US20180109270A1
公开(公告)日：2018-04-19
申请号：US15842565
申请日：2017-12-14
Inventor： Sung-Ik PARK , Sun-Hyoung KWON , Jae-Young LEE , Heung-Mook KIM , Nam-Ho HUR
CPC classification number: H03M13/2792 , H03M13/1102 , H03M13/1165 , H03M13/255 , H03M13/271 , H03M13/2778 , H03M13/616 , H03M13/6552 , H04L1/0041 , H04L1/0058 , H04L1/0071
Abstract: A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 64800 and a code rate of 2/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for 16-symbol mapping.
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Patent Agency Ranking
公开(公告)号：US20180013448A1
公开(公告)日：2018-01-11
申请号：US15703842
申请日：2017-09-13
Inventor： Sung-Ik PARK , Sun-Hyoung KWON , Bo-Mi LIM , Jae-Young LEE , Heung-Mook KIM , Nam-Ho HUR
CPC classification number: H03M13/2767 , H03M13/1105 , H03M13/1165 , H03M13/255 , H03M13/2778 , H03M13/2792 , H04L1/0041 , H04L1/0071
Abstract: A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 16200 and a code rate of 4/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for 64-symbol mapping.
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107.发明申请公开(公告)号：US20170310343A1
公开(公告)日：2017-10-26
申请号：US15645924
申请日：2017-07-10
Inventor： Sung-Ik PARK , Sun-Hyoung KWON , Jae-Young LEE , Heung-Mook KIM , Nam-Ho HUR
CPC classification number: H03M13/1165 , H03M13/255 , H03M13/2792 , H03M13/616 , H03M13/6552 , H04L1/0041 , H04L1/0042 , H04L1/0057 , H04L1/0071 , H04L27/3422
Abstract: A modulator and a modulation method using a non-uniform 16-symbol signal constellation are disclosed. The modulator includes a memory and a processor. The memory receives a codeword corresponding to a low-density parity check (LDPC) code having a code rate of 4/15. The processor maps the codeword to 16 symbols of the non-uniform 16-symbol signal constellation on a 4-bit basis.
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108.发明申请公开(公告)号：US20170302298A1
公开(公告)日：2017-10-19
申请号：US15641084
申请日：2017-07-03
Inventor： Sung-Ik PARK , Heung-Mook KIM , Sun-Hyoung KWON , Nam-Ho HUR
CPC classification number: H03M13/255 , H03M13/036 , H03M13/1102 , H03M13/1105 , H03M13/116 , H03M13/1165 , H03M13/1185 , H03M13/616 , H04L1/0043 , H04L1/0057
Abstract: A low density parity check (LDPC) encoder, an LDPC decoder, and an LDPC encoding method are disclosed. The LDPC encoder includes first memory, second memory, and a processor. The first memory stores an LDPC codeword having a length of 16200 and a code rate of 5/15. The second memory is initialized to 0. The processor generates the LDPC codeword corresponding to information bits by performing accumulation with respect to the second memory using a sequence corresponding to a parity check matrix (PCM).
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109.发明申请公开(公告)号：US20170302297A1
公开(公告)日：2017-10-19
申请号：US15642199
申请日：2017-07-05
Inventor： Sung-Ik PARK , Heung-Mook KIM , Sun-Hyoung KWON , Nam-Ho HUR
CPC classification number: H03M13/1185 , H03M13/1102 , H03M13/1105 , H03M13/116 , H03M13/1165 , H03M13/255 , H03M13/616 , H04L1/0041 , H04L1/0043 , H04L1/0057 , H04L1/0065
Abstract: A low density parity check (LDPC) encoder, an LDPC decoder, and an LDPC encoding method are disclosed. The LDPC encoder includes first memory, second memory, and a processor. The first memory stores an LDPC codeword having a length of 64800 and a code rate of 5/15. The second memory is initialized to 0. The processor generates the LDPC codeword corresponding to information bits by performing accumulation with respect to the second memory using a sequence corresponding to a parity check matrix (PCM).
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110.发明申请公开(公告)号：US20170290007A1
公开(公告)日：2017-10-05
申请号：US15478057
申请日：2017-04-03
Inventor： Sung-Ik PARK , Sun-Hyoung KWON , Jae-Young LEE , Bo-Mi LIM , Heung-Mook KIM , Nam-Ho HUR
CPC classification number: H04L1/0042 , H04L1/0043 , H04L1/0052 , H04L1/0057 , H04L1/0071 , H04L1/0075 , H04L12/1877 , H04L12/189 , H04L2001/0093
Abstract: An apparatus and method for generating a broadcast signal frame for signaling a time interleaving mode are disclosed. An apparatus for generating broadcast signal frame according to an embodiment of the present invention includes a combiner configured to generate a multiplexed signal by combining a core layer signal and an enhanced layer signal; a power normalizer configured to perform power-normalizing for reducing the power of the multiplexed signal to a power level corresponding to the core layer signal; a time interleaver configured to generate a time-interleaved signal by performing time interleaving after performing the power-normalizing; and a frame builder configured to generate a broadcast signal frame including a preamble for signaling a time interleaving mode corresponding to the time interleaver for each of physical layer pipes (PLPs).
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