公开(公告)号：US20080018368A1

公开(公告)日：2008-01-24

申请号：US11855153

申请日：2007-09-14

申请人： Sanjay WADHWA ,  Siddhartha G.K.

发明人： Sanjay WADHWA ,  Siddhartha G.K.

IPC分类号： H03K17/22

CPC分类号： H03K19/00315 ,  G01R19/16552 ,  G06F1/24 ,  G06F1/28 ,  G06F1/32 ,  H03K17/223 ,  H03K17/302 ,  H03K2217/0036

摘要： A brown out detector includes a first resistive element connected to a first voltage and a first node. A capacitor is connected to the first node and a second voltage. The detector also includes a second transistor and a third transistor. The second transistor has a drain connected to a second node, a source connected to the first node, and a gate connected to the first voltage. The third transistor has a source connected to the second voltage and the capacitor, a drain connected to the second node, and a gate connected to the first voltage. The detector also includes a latch having an input connected to the second node and a detector output, which generates a reset signal when the first voltage is less than a detection threshold voltage.

摘要翻译： 褐色检测器包括连接到第一电压和第一节点的第一电阻元件。 电容器连接到第一节点和第二电压。 检测器还包括第二晶体管和第三晶体管。 第二晶体管具有连接到第二节点的漏极，连接到第一节点的源极和连接到第一电压的栅极。 第三晶体管具有连接到第二电压的源极和电容器，连接到第二节点的漏极和连接到第一电压的栅极。 检测器还包括具有连接到第二节点的输入端的锁存器和当第一电压小于检测阈值电压时产生复位信号的检测器输出。

公开(公告)号：US20070296421A1

公开(公告)日：2007-12-27

申请号：US11759375

申请日：2007-06-07

申请人： Toshiyuki MATSUNAGA

发明人： Toshiyuki MATSUNAGA

IPC分类号： G01R27/08

CPC分类号： G01R31/31721 ,  G01R19/16528 ,  G01R19/16552 ,  G01R31/3004 ,  G01R31/31701

摘要： A voltage drop measurement circuit includes a voltage drop circuit to generate an output voltage and fluctuate the output voltage according to a fluctuation in a power supply voltage, where the output voltage being the power supply voltage dropped by a predetermined amount and a flip-flop to retain a flag indicating a drop in the power supply voltage according to the output voltage.

摘要翻译： 电压降测量电路包括：电压降电路，用于产生输出电压，并根据电源电压的波动波动输出电压，其中电源电压的输出电压下降预定量，触发器变为 保持指示根据输出电压降低电源电压的标志。

公开(公告)号：US20070273353A1

公开(公告)日：2007-11-29

申请号：US11520733

申请日：2006-09-14

申请人： Koji Okamoto

发明人： Koji Okamoto

IPC分类号： H02M5/257

CPC分类号： G01R19/16552 ,  G01R31/3004

摘要： The present invention relates to a technique capable of reliably detecting supply voltages at a plurality of points in an integrated circuit with a simple arrangement and improving the setting accuracy of a supply voltage to the integrated circuit irrespective of position in the interior of the integrated circuit. The integrated circuit internally includes a plurality of voltage sense points, a selection circuit connected to each of the plurality of voltage sense points for selecting one of the plurality of voltage sense points on the basis of an input signal, and a voltage sense terminal connected to the selection circuit for outputting a voltage of the one voltage sense point, selected by the selection circuit, to the exterior of the integrated circuit.

摘要翻译： 本发明涉及一种能够以简单的布置可靠地检测集成电路中的多个点处的电源电压的技术，并且提高了对集成电路的电源电压的设置精度，而与集成电路内部的位置无关。 集成电路内部包括多个电压检测点，连接到多个电压检测点中的每一个的选择电路，用于基于输入信号选择多个电压检测点中的一个，以及连接到 所述选择电路用于将由所述选择电路选择的所述一个电压检测点的电压输出到所述集成电路的外部。

公开(公告)号：US20070239387A1

公开(公告)日：2007-10-11

申请号：US11278848

申请日：2006-04-06

申请人： Daniel Douriet ,  Anand Haridass ,  Andreas Huber ,  Colm O'Reilly ,  Bao Truong ,  Roger Weekly

发明人： Daniel Douriet ,  Anand Haridass ,  Andreas Huber ,  Colm O'Reilly ,  Bao Truong ,  Roger Weekly

IPC分类号： G06F19/00

CPC分类号： G01R19/16552

摘要： An apparatus and method are provided for monitoring the voltage available in each domain of multiple voltage domains of a partitioned electronic chip. In embodiments of the invention, only a single pair of C4 pins is required for all voltage monitoring activity. One useful embodiment is directed to apparatus for monitoring the level of voltage associated with each domain in a partitioned chip. The apparatus comprises a single conductive link coupled to the chip, and further comprises a domain selection network having a single output and a plurality of switchable inputs, the output being connected to the single conductive link, and two inputs being connected to monitor respective voltage levels of two of the plurality of voltage domains. A control mechanism is disposed to operate the selection network, in order to selectively connect one of the inputs to the single conductive link, and a sensor device external to the electronic chip is connected to measure the monitored respective voltage levels of two of the plurality of voltage domains using the single conductive link.

摘要翻译： 提供了一种用于监视分区电子芯片的多个电压域的每个域中可用电压的装置和方法。 在本发明的实施例中，对于所有电压监视活动，仅需要一对C4引脚。 一个有用的实施例涉及用于监视与分区芯片中的每个域相关联的电压电平的装置。 该装置包括耦合到芯片的单个导电链路，并且还包括具有单个输出和多个可切换输入的域选择网络，该输出连接到单个导电链路，并且两个输入端被连接以监视相应的电压电平 的多个电压域中的两个。 设置控制机构以操作选择网络，以便选择性地将输入中的一个连接到单个导电链路，并且电子芯片外部的传感器装置被连接以测量所监视的相应的多个 电压域使用单个导电链路。

公开(公告)号：US20070126449A1

公开(公告)日：2007-06-07

申请号：US11309030

申请日：2006-06-12

申请人： MING-SHIU OU YANG ,  WEI-YUAN CHEN ,  SUNG-KUO KU ,  CHO-HAO WANG

发明人： MING-SHIU OU YANG ,  WEI-YUAN CHEN ,  SUNG-KUO KU ,  CHO-HAO WANG

IPC分类号： G01R31/02

CPC分类号： G01R19/16552

摘要： A system and method for measuring performance of a voltage regulator module (VRM) (61) attached to a microprocessor (62) is disclosed. The system includes: a voltage transient tester (VTT) fixture (5) for setting different working voltage levels of the VRM; an oscillograph (2) for measuring transient voltage levels of the VRM, and generating a transient voltage waveform according to the transient voltage levels; an voltmeter (3) for measuring steady voltage levels of the VRM under thermal effects generated by the microprocessor; a direct current (DC) electronic load (4) for educing load currents from the VRM; and a measurement control module (10) installed in a computer (1) for generating load current control signals, controlling the DC electronic load to educe the load currents from the VRM according to the load current control signals, and generating a performance report of the VRM by integrating various measurement results.

摘要翻译： 公开了一种用于测量附接到微处理器（62）的电压调节器模块（VRM）（61）的性能的系统和方法。 该系统包括：用于设置VRM的不同工作电压电平的电压瞬变测试仪（VTT）灯具（5） 用于测量VRM的瞬态电压电平的示波器（2），以及根据瞬态电压电平产生瞬态电压波形; 用于在由微处理器产生的热效应下测量VRM的稳定电压电平的电压表（3）; 直流（DC）电子负载（4），用于教育来自VRM的负载电流; 以及安装在计算机（1）中的用于产生负载电流控制信号的测量控制模块（10），控制DC电子负载以根据负载电流控制信号从VRM中减少负载电流，并且生成 VRM通过集成各种测量结果。

公开(公告)号：US20070094581A1

公开(公告)日：2007-04-26

申请号：US11582908

申请日：2006-10-18

申请人： Mikihiro Kajita

发明人： Mikihiro Kajita

IPC分类号： H04L1/00

CPC分类号： G01R19/16552 ,  G01R19/16585 ,  G01R31/40 ,  G06F1/28

摘要： To provide a signal measuring circuit that measures a signal, such as noise, with high precision. A maximum reference value and a minimum reference value are generated based on the voltage level of a signal, the voltage difference between the maximum reference value and the minimum reference value is divided, a reference value is generated according to the divided voltage, and the voltage level of the signal is compared with the reference value, thereby measuring the signal.

摘要翻译： 提供以高精度测量诸如噪声的信号的信号测量电路。 基于信号的电压电平生成最大基准值和最小基准值，分割最大基准值与最小基准值之间的电压差，根据分压产生基准值， 将信号电平与参考值进行比较，从而测量信号。

公开(公告)号：US20070085599A1

公开(公告)日：2007-04-19

申请号：US11558072

申请日：2006-11-09

申请人： Kenichi Imamiya

发明人： Kenichi Imamiya

IPC分类号： G05F1/10

CPC分类号： G11C5/143 ,  G01R19/16552 ,  G11C5/145 ,  G11C16/12 ,  G11C16/30 ,  H01L27/0629 ,  H01L27/0811 ,  H02M3/073

摘要： An integrated semiconductor circuit has a potential detector for detecting a potential boosted by a high voltage generator. One terminal of a first capacitor is connected to a potential detection terminal via a first switching device, the other terminal thereof being connected to a reference potential terminal. A terminal of a second capacitor is connected, via a second switching device, to a first node at which the first switching device and the first capacitor are connected, the other terminal thereof being connected to the reference potential terminal. A third switch is connected between a second node at which the second switching device and the second capacitor are connected and the reference potential terminal. A clock generator generates clock signals to simultaneously and periodically turn on the first and the third switching devices whereas turn on the second switch periodically in an opposite timing for the first and the third switching devices. A comparator compares a potential at the second node with a reference potential and outputs a detection signal when a potential at the potential detection terminal reaches a predetermined potential.

摘要翻译： 集成半导体电路具有用于检测由高压发生器升压的电位的电位检测器。 第一电容器的一个端子经由第一开关器件连接到电位检测端子，其另一端子连接到参考电位端子。 第二电容器的端子经由第二开关器件连接到第一开关器件和第一电容器连接的第一节点，其另一端子连接到参考电位端子。 第三开关连接在第二开关装置和第二电容器连接的第二节点和参考电位端子之间。 时钟发生器产生时钟信号以同时并周期性地接通第一和第三开关装置，同时以与第一和第三开关装置相反的定时周期性地接通第二开关。 比较器将第二节点处的电位与参考电位进行比较，并且当电势检测端的电位达到预定电位时，输出检测信号。

公开(公告)号：US20070005274A1

公开(公告)日：2007-01-04

申请号：US11171789

申请日：2005-06-30

申请人： Shashank Wekhande

发明人： Shashank Wekhande

IPC分类号： G01R31/00

CPC分类号： G01R19/16552

摘要： Apparatus for detecting failure of an isolation device includes a current sensor to sense current through the isolation device and a circuit responsive to the current sensor output signal and to an enable signal that controls the isolation device for providing an Early Failure Warning (EFW) signal indicative of whether the isolation device has failed. The enable signal is at a first logic level when the isolation device is on and is brought to a second logic level to disable and test the isolation device. Also described is a method of detecting a failure of an isolation device including disabling the isolation device, sensing a current through the isolation device, and providing an EFW signal indicating that the isolation device has failed if the current through the isolation device is greater than a predetermined level when the isolation device is disabled.

公开(公告)号：US20070001714A1

公开(公告)日：2007-01-04

申请号：US11169012

申请日：2005-06-29

申请人： Alireza Zolfaghari

发明人： Alireza Zolfaghari

IPC分类号： H03K5/22

CPC分类号： G01R19/16552 ,  H03K5/082 ,  H03K17/223

摘要： An input power supply voltage level detection circuit and method are presented. The circuit includes a main detector core and a two-inverter buffer block that can include a first inverter and a second inverter. The circuit receives a voltage input signal and outputs a voltage output signal that is substantially equal to either the voltage input signal or ground, depending on whether the voltage input signal has reached a threshold voltage. The threshold voltage is defined by component characteristics of the main detector core and the two-inverter buffer block. The circuit can receive a hysteresis input signal, tied to the voltage input signal or the ground, that allows the threshold voltage to have a first threshold value when the voltage input signal increases and a second threshold value when the voltage input signal decreases. A power down input signal can also be received that allows the circuit to be powered down.

公开(公告)号：US07157947B2

公开(公告)日：2007-01-02

申请号：US10731393

申请日：2003-12-09

申请人： Chaiyuth Chansungsan ,  Keith Self

发明人： Chaiyuth Chansungsan ,  Keith Self

IPC分类号： H03K4/06 ,  H03K3/02

CPC分类号： G01R19/16552 ,  H04B15/005

摘要： In some embodiments, a circuit includes a reference current source to provide a substantially noise free current signal, and a detector coupled to one or two power supplies. In some embodiments, a method includes receiving a substantially noise free current signal, receiving one or two power supply signals, processing the substantially noise free current signal and the one or two power supply signals to detect a noise signal in the one or two power supply signals, and generating a noise detection signal in response to detection of the noise signal.

摘要翻译： 在一些实施例中，电路包括参考电流源以提供基本上无噪声的电流信号，以及耦合到一个或两个电源的检测器。 在一些实施例中，一种方法包括接收基本无噪声的电流信号，接收一个或两个电源信号，处理基本上无噪声的电流信号和一个或两个电源信号以检测一个或两个电源中的噪声信号 信号，并且响应于噪声信号的检测而产生噪声检测信号。