公开(公告)号：US20070158200A1

公开(公告)日：2007-07-12

申请号：US11478934

申请日：2006-06-29

Applicant: Adam Cohen ,  Michael Lockard ,  Gang Zhang

Inventor： Adam Cohen ,  Michael Lockard ,  Gang Zhang

IPC: C25D5/00 ,  B01J19/08

CPC classification number: C25D5/00 ,  B33Y10/00 ,  B81C99/0095 ,  B81C2201/0181 ,  C23C4/02 ,  C23C18/1605 ,  C23C18/1651 ,  C23C26/00 ,  C23C28/021 ,  C23C28/023 ,  C23C28/028 ,  C25D1/003

Abstract: Embodiments are directed to electrochemically fabricating multi-layer three dimensional structures where each layer comprises at least one structural and at least one sacrificial material and wherein at least some metals or alloys are electrodeposited during the formation of some layers and at least some metals are deposited during the formation of some layers that are either difficult to electrodeposit and/or are difficult to electrodeposit onto. In some embodiments, the hard to electrodeposit metals (e.g. Ti, NiTi, W, Ta, Mo, etc.) may be deposited via chemical or physical vacuum deposition techniques while other techniques are used in other embodiments. In some embodiments, prior to electrodepositing metals, the surface of the previously formed layer is made to undergo appropriate preparation for receiving an electrodeposited material. Various surface preparation techniques are possible, including, for example, anodic activation, cathodic activation, and vacuum deposition of a seed layer and possibly an adhesion layer.

Abstract translation: 实施例涉及电化学制造多层三维结构，其中每层包括至少一种结构和至少一种牺牲材料，并且其中至少一些金属或合金在形成一些层期间被电沉积，并且至少一些金属在 形成难以电沉积和/或难以电沉积的一些层。 在一些实施方案中，可以通过化学或物理真空沉积技术沉积难以电沉积的金属（例如Ti，NiTi，W，Ta，Mo等），而在其它实施方案中使用其它技术。 在一些实施方案中，在电沉积金属之前，使先前形成的层的表面经历适当的准备以接收电沉积材料。 各种表面处理技术是可能的，包括例如阳极活化，阴极活化和种子层以及可能的粘附层的真空沉积。

公开(公告)号：US20070102299A1

公开(公告)日：2007-05-10

申请号：US11646843

申请日：2006-12-27

Applicant: Adam Cohen

Inventor： Adam Cohen

IPC: C25D5/02

CPC classification number: B81C1/00492 ,  B33Y10/00 ,  C25D1/003 ,  C25D1/08 ,  C25D5/022 ,  C25D5/10 ,  C25D7/12

Abstract: Multilayer structures are electrochemically fabricated via depositions of one or more materials in a plurality of overlaying and adhered layers. Selectivity of deposition is obtained via a multi-cell controllable mask. Alternatively, net selective deposition is obtained via a blanket deposition and a selective removal of material via a multi-cell mask. Individual cells of the mask may contain electrodes comprising depositable material or electrodes capable of receiving etched material from a substrate. Alternatively, individual cells may include passages that allow or inhibit ion flow between a substrate and an external electrode and that include electrodes or other control elements that can be used to selectively allow or inhibit ion flow and thus inhibit significant deposition or etching. Single cell masks having a cell size that is smaller or equal to the desired deposition resolution may also be used to form structures.

Abstract translation: 多层结构通过在多个覆盖层和粘附层中的一种或多种材料的沉积进行电化学制造。 沉积的选择性通过多单元可控掩模获得。 或者，通过覆盖沉积和通过多细胞掩模选择性去除材料获得净选择性沉积。 掩模的各个单元可以包含包含可沉积材料的电极或能够从基底接受蚀刻材料的电极。 或者，单个电池可以包括允许或抑制衬底和外部电极之间的离子流动的通道，并且包括可用于选择性地允许或抑制离子流动并因此抑制显着沉积或蚀刻的电极或其它控制元件的通道。 具有小于或等于所需沉积分辨率的单元尺寸的单细胞掩模也可用于形成结构。

公开(公告)号：US20070015367A1

公开(公告)日：2007-01-18

申请号：US11523206

申请日：2006-09-19

Applicant: Adam Cohen ,  Dennis Smalley ,  Michael Lockard ,  Qui Le

Inventor： Adam Cohen ,  Dennis Smalley ,  Michael Lockard ,  Qui Le

IPC: H01L21/311

CPC classification number: H01L21/288 ,  B33Y10/00 ,  C23C18/1605 ,  C25D5/022 ,  C25D5/10 ,  H01L21/311 ,  H01L21/7682 ,  H01L21/76879

Abstract: A method of fabricating three-dimensional structures from a plurality of adhered layers of at least a first and a second material wherein the first material is a conductive material and wherein each of a plurality of layers includes treating a surface of a first material prior to deposition of the second material. The treatment of the surface of the first material either (1) decreases the susceptibility of deposition of the second material onto the surface of the first material or (2) eases or quickens the removal of any second material deposited on the treated surface of the first material. In some embodiments the treatment of the first surface includes forming a dielectric coating over the surface and the second material is electrodeposited (e.g. using an electroplating or electrophoretic process). In other embodiments the first material is coated with a conductive material that doesn't readily accept deposits of electroplated or electroless deposited materials.

Abstract translation: 从至少第一和第二材料的多个粘附层制造三维结构的方法，其中所述第一材料是导电材料，并且其中多个层中的每一个包括在沉积之前处理第一材料的表面 的第二种材料。 第一材料的表面的处理（1）降低了将第二材料沉积到第一材料的表面上的敏感性，或（2）减轻或加快了沉积在第一材料的处理表面上的任何第二材料的去除 材料。 在一些实施例中，第一表面的处理包括在表面上形成电介质涂层，并且第二材料被电沉积（例如使用电镀或电泳工艺）。 在其它实施例中，第一材料涂覆有不容易接受电镀或无电沉积材料沉积物的导电材料。

公开(公告)号：US07131398B2

公开(公告)日：2006-11-07

申请号：US11054007

申请日：2005-02-08

Applicant: Adam Cohen ,  Josh Tang

Inventor： Adam Cohen ,  Josh Tang

IPC: A01K1/03

CPC classification number: G01F5/00 ,  A01K1/031 ,  G01F1/68

Abstract: An environmental monitoring and controlling system for a ventilated cage and rack system that monitors and measures air flow in the rack at either the rack or cage level. At the rack level, two pressure sensors are provided in a supply air system to accurately monitor the air flow rate into the rack. In addition, two pressure sensors may be provided in an exhaust air system to accurately monitor the air flow rate out of the rack. At the cage level, a cage may be equipped with a highly accurate pressure sensor, including a Venturi tube and thermistor, the monitor the air flow rate in a cage located at any cage position in the rack.

公开(公告)号：US20060238209A1

公开(公告)日：2006-10-26

申请号：US11325404

申请日：2006-01-03

Applicant: Richard Chen ,  Ezekiel Kruglick ,  Christopher Bang ,  Vacit Arat ,  Adam Cohen ,  Kieun Kim ,  Gang Zhang ,  Dennis Smalley

Inventor： Richard Chen ,  Ezekiel Kruglick ,  Christopher Bang ,  Vacit Arat ,  Adam Cohen ,  Kieun Kim ,  Gang Zhang ,  Dennis Smalley

IPC: G01R31/02

CPC classification number: G01R3/00 ,  C23C18/1605 ,  C23C18/1651 ,  C25D1/003 ,  G01R1/06716 ,  G01R1/06722 ,  G01R1/06738

Abstract: Multilayer probe structures for testing or otherwise making electrical contact with semiconductor die or other electronic components are electrochemically fabricated via depositions of one or more materials in a plurality of overlaying and adhered layers. In some embodiments the structures may include configurations intended to enhance functionality, buildability, or both.

Abstract translation: 用于测试或以其他方式与半导体管芯或其他电子部件进行电接触的多层探针结构通过在多个覆盖层和附着层中的一种或多种材料的沉积进行电化学制造。 在一些实施例中，结构可以包括旨在增强功能性，可构建性或两者的配置。

公开(公告)号：US20060226015A1

公开(公告)日：2006-10-12

申请号：US11325405

申请日：2006-01-03

Applicant: Dennis Smalley ,  Adam Cohen ,  Ananda Kumar ,  Michael Lockard

Inventor： Dennis Smalley ,  Adam Cohen ,  Ananda Kumar ,  Michael Lockard

IPC: C25D5/02

CPC classification number: A61N1/00 ,  C23C18/1605 ,  C23C18/1651 ,  C25D1/003 ,  C25D1/20 ,  C25D5/022 ,  G01R1/0483 ,  G01R1/06716 ,  G01R1/07357 ,  G01R31/2886 ,  H05K3/467 ,  H05K3/4682

Abstract: Electrochemical fabrication processes and apparatus for producing multi-layer structures where each layer includes the deposition of at least two materials and wherein the formation of at least some layers including operations for providing coatings of dielectric material that isolate at least-portions of a first conductive material from (1) other portions of the first conductive material, (2) a second conductive material, or (3) another dielectric material, and wherein the thickness of the dielectric coatings are thin compared to the thicknesses of the layers used in forming the structures. In some preferred embodiments, portions of each individual layer are encapsulated by dielectric material while in other embodiments only boundaries between distinct regions of materials are isolated from one another by dielectric barriers.

Abstract translation: 用于生产多层结构的电化学制造方法和装置，其中每个层包括至少两种材料的沉积，并且其中形成至少一些层，包括用于提供绝缘材料的涂层的操作，所述介电材料的涂层隔离第一导电材料的至少一部分 从（1）第一导电材料的其他部分，（2）第二导电材料或（3）另一种介电材料，并且其中电介质涂层的厚度与用于形成结构的层的厚度相比较薄 。 在一些优选实施例中，每个单独层的部分被电介质材料包封，而在其它实施例中，材料的不同区域之间的边界通过电介质屏障彼此隔离。

公开(公告)号：US20060135850A1

公开(公告)日：2006-06-22

申请号：US11320491

申请日：2005-12-29

Applicant: Adam Cohen ,  John Golden ,  Liem Vu

Inventor： Adam Cohen ,  John Golden ,  Liem Vu

IPC: A61B1/00

CPC classification number: A61B1/00137 ,  A61B1/018 ,  A61B17/3462 ,  A61M39/0606

Abstract: The invention relates to an endoscope channel cap that may be used separately with two or more endoscopes each having a cap interface portion with a different configuration. The channel cap also may include one or more seals to maintain insufflation pressure both when an endoscopic instrument is inserted in a working channel of the endoscope and when the instrument is not inserted in the channel.

公开(公告)号：US06971940B2

公开(公告)日：2005-12-06

申请号：US10228797

申请日：2002-08-27

Applicant: Adam Cohen ,  Stephen S. Roma

Inventor： Adam Cohen ,  Stephen S. Roma

IPC: A63H33/18 ,  A63H33/22 ,  A63H27/00

CPC classification number: A63H33/18 ,  A63H33/22

Abstract: An illuminated flying disc may have adapted to attach a light source to the disc in the area of the rim in a manner that may have no substantial effect on the aerodynamic qualities of the device and is sufficient to hold the light source in place while throwing and upon impact with obstacles, said device being durable, safe and easy to use.

Abstract translation: 照明的飞盘可以适于将光源附接到轮辋的区域中，其方式可能对设备的空气动力学质量没有实质影响，并且足以在投掷时将光源保持在适当位置， 在碰撞障碍物时，所述装置是耐用的，安全的并且容易使用。

公开(公告)号：US20050253606A1

公开(公告)日：2005-11-17

申请号：US11029169

申请日：2005-01-03

Applicant: Kieun Kim ,  Adam Cohen ,  Willa Larsen ,  Richard Chen ,  Ananda Kumar ,  Ezekiel Kruglick ,  Vacit Arat ,  Gang Zhang ,  Michael Lockard

Inventor： Kieun Kim ,  Adam Cohen ,  Willa Larsen ,  Richard Chen ,  Ananda Kumar ,  Ezekiel Kruglick ,  Vacit Arat ,  Gang Zhang ,  Michael Lockard

IPC: G01R31/02 ,  H01R12/00 ,  H01R13/187 ,  H01R24/58

CPC classification number: H01R13/187 ,  H01L24/72 ,  H01L2924/15747 ,  H01L2924/00

Abstract: Embodiments of the present invention are directed to the formation of microprobe tips elements having a variety of configurations. In some embodiments tips are formed from the same building material as the probes themselves, while in other embodiments the tips may be formed from a different material and/or may include a coating material. In some embodiments, the tips are formed before the main portions of the probes and the tips are formed in proximity to or in contact with a temporary substrate. Probe tip patterning may occur in a variety of different ways, including, for example, via molding in patterned holes that have been isotropically or anisotropically etched silicon, via molding in voids formed in over exposed photoresist, via molding in voids in a sacrificial material that have formed as a result of the sacrificial material mushrooming over carefully sized and located regions of dielectric material, via isotropic etching of a the tip material around carefully sized placed etching shields, via hot pressing, and the like.

公开(公告)号：US20050230261A1

公开(公告)日：2005-10-20

申请号：US11029216

申请日：2005-01-03

Applicant: Adam Cohen ,  Michael Lockard ,  Kieun Kim ,  Qui Le ,  Gang Zhang ,  Uri Frodis ,  Dale McPherson ,  Dennis Smalley

Inventor： Adam Cohen ,  Michael Lockard ,  Kieun Kim ,  Qui Le ,  Gang Zhang ,  Uri Frodis ,  Dale McPherson ,  Dennis Smalley

IPC: B44C1/22 ,  C03C15/00 ,  C03C25/68 ,  C23F1/00 ,  C25D5/02 ,  C25D5/10 ,  H01L21/44 ,  H01L21/4763

CPC classification number: C25D1/003 ,  C23C18/1605 ,  C23C18/1608 ,  C23C18/165 ,  C23C18/1653 ,  C23C18/405 ,  C25D5/022 ,  C25D5/10

Abstract: Some embodiments of the present invention are directed to techniques for building up single layer or multi-layer structures on dielectric or partially dielectric substrates. Certain embodiments deposit seed layer material directly onto substrate materials while other embodiments use an intervening adhesion layer material. Some embodiments use different seed layer materials and/or adhesion layer materials for sacrificial and structural conductive building materials. Some embodiments apply seed layer and/or adhesion layer materials in what are effectively selective manners while other embodiments apply the materials in blanket fashion. Some embodiments remove extraneous depositions (e.g. depositions to regions unintended to form part of a layer) via planarization operations while other embodiments remove the extraneous material via etching operations. Other embodiments are directed to the electrochemical fabrication of multilayer mesoscale or microscale structures which are formed using at least one conductive structural material, at least one conductive sacrificial material, and at least one dielectric material. In some embodiments the dielectric material is a UV-curable photopolymer.

Abstract translation: 本发明的一些实施例涉及在电介质或部分电介质基底上建立单层或多层结构的技术。 某些实施方案将种子层材料直接沉积到基底材料上，而其它实施例使用中间粘合层材料。 一些实施例使用不同种子层材料和/或用于牺牲和结构导电建筑材料的粘合层材料。 一些实施例将种子层和/或粘合层材料应用于有选择性的方式，而其它实施例以毯子的方式应用材料。 一些实施例通过平面化操作去除外来沉积物（例如沉积到不想要形成层的一部分的区域），而其他实施例通过蚀刻操作去除外来材料。 其它实施方案涉及使用至少一种导电结构材料，至少一种导电牺牲材料和至少一种电介质材料形成的多层中尺度或微结构结构的电化学制造。 在一些实施方案中，电介质材料是可UV固化的光聚合物。