知搜-全球专利检索

  1. Login
  2. Sign Up

Search Results

243 records (took 0.029 seconds)

    Image Tampering Forensics Method and Apparatus
    91.
    发明申请
    Image Tampering Forensics Method and Apparatus 审中-公开

    公开(公告)号：US20190228564A1

    公开(公告)日：2019-07-25

    申请号：US16336918

    申请日：2017-03-09

    Applicant: INSTITUTE OF AUTOMATION, CHINESE ACADEMY OF SCIENCES

    Inventor： Tieniu TAN ,  Jing DONG ,  Wei WANG ,  Bo PENG

    IPC: G06T15/20 ,  G06K9/00

    Abstract: An image tampering forensics method includes labeling an observation clue of a to-be-detected image, constructing a three-dimensional morphable model of an object of a category to which the target object belongs, estimating a three-dimensional normal vector to the supporting plane according to the observation clue, estimating a three-dimensional attitude of the target object according to the observation clue and the three-dimensional morphable model to obtain a plane normal vector to a plane where a side of target object in contact with the supporting plane is located, computing a parallelism between the target object and the supporting plane, and/or among a plurality of target objects, and judging whether the to-be-detected image is a tampered image or not according to the parallelism.

    Memory cell of static random access memory based on DICE structure
    92.
    发明授权
    Memory cell of static random access memory based on DICE structure 有权

    公开(公告)号：US10262724B2

    公开(公告)日：2019-04-16

    申请号：US15551024

    申请日：2015-03-27

    Applicant: Institute of Automation Chinese Academy of Sciences

    Inventor： Li Liu ,  Jingqiu Wang ,  Liang Chen

    IPC: G11C11/419 ,  G06F3/06 ,  H01L27/11 ,  G11C11/412 ,  G11C29/00

    Abstract: A memory cell of a static random access memory based on DICE structure, which includes a redundant information latch circuit and a redundant bit selection circuit. The redundant information latch circuit is formed by four MOS transistors and includes four data storage nodes, the redundant bit selection circuit is formed by four MOS transistors M0, M1, M2 and M3, with their drains connected to the four data storage nodes X0, X1, X2 and X3. Sources of M0 and M2 are connected to each other and are connected to a bit line BL, sources of M1 and M3 are connected to each other and are connected to a bit line BLB; and gates of the four MOS transistors are connected to each other and are connected to a word line WL.

    Memory Cell of Static Random Access Memory Based on Resistance and Capacitance Hardening
    96.
    发明申请
    Memory Cell of Static Random Access Memory Based on Resistance and Capacitance Hardening 审中-公开

    公开(公告)号：US20180166125A1

    公开(公告)日：2018-06-14

    申请号：US15551008

    申请日：2015-03-27

    Applicant: Institute of Automation Chinese Academy of Sciences

    Inventor： Jingqiu Wang ,  Liang Chen ,  Li LIU

    IPC: G11C11/417 ,  G11C11/412 ,  H01L27/11

    CPC classification number: G11C11/417 ,  G11C11/4125 ,  H01L27/1104

    Abstract: The present invention provides a memory cell of static random access memory based on resistance-capacitance reinforcement, which comprises a latch circuit and a bit selection circuit, the latch circuit consists of two PMOS transistors P1 and P2, two NMOS transistors N1 and N2, a first resistance-capacitance network and a second resistance-capacitance network; the bit selection circuit consists of NMOS transistors N5 and N6; the latch circuit forms four storage nodes X1, X1B, X2, X2B, among which a coupling capacitor C is provided between a pair of complementary data storage nodes. Compared to the conventional memory cell of 6T structure, a resistance-capacitance network and a coupling capacitor are added, so that without changing the original read operation circuit and without obviously increasing complexity, the memory cell is prevented from having single event upset merely at a cost of increasing a small amount of area, thus ensuring correctness of data.

    Parallel filtering method and corresponding apparatus
    98.
    发明授权
    Parallel filtering method and corresponding apparatus 有权

    公开(公告)号：US09966932B2

    公开(公告)日：2018-05-08

    申请号：US14785359

    申请日：2013-04-19

    Applicant: Institute of Automation, Chinese Academy of Sciences

    Inventor： Donglin Wang ,  Leizu Yin ,  Yongyong Yang ,  Shaolin Xie ,  Tao Wang

    IPC: G06F17/10 ,  H03H17/02

    CPC classification number: H03H17/0223 ,  H03H2017/0245 ,  H03H2218/10

    Abstract: An apparatus for parallel filtering, including a multi-granularity memory, a data cache device, a coefficient buffer broadcast device, a vector operation device and a command queue device. The multi-granularity memory is configured to store data to be filtered, filter coefficients and filtering result data. The data cache device is configured to cache, read and update the data to be filtered. The coefficient buffer broadcast device is configured to cache and broadcast the read filter coefficients. The command queue device is configured to store and output a queue of operation commands for the parallel filtering operation. The vector operation device is configured to perform a vector operation based on the data to be filtered and the output coefficient data, and write an operation result into the multi-granularity filtering result storage unit. A method is also provided. The apparatus and method have a fast filtering speed, a smaller number of accesses, an improved usage efficiency, a reduced power consumption and a wide application scope.

    Method for detecting horizontal and gravity directions of an image
    99.
    发明授权
    Method for detecting horizontal and gravity directions of an image 有权

    公开(公告)号：US09886775B2

    公开(公告)日：2018-02-06

    申请号：US15306980

    申请日：2014-04-28

    Applicant: Institute of Automation Chinese Academy of Sciences

    Inventor： Zhiqiang Cao ,  Xilong Liu ,  Chao Zhou ,  Min Tan ,  Kun Ai

    IPC: G06K9/00 ,  G06T7/60

    CPC classification number: G06T7/60 ,  G06T7/70 ,  G06T2207/10004 ,  G06T2207/20021 ,  G06T2207/20084 ,  G06T2207/30244 ,  G06T2207/30252

    Abstract: The disclosure relates to a method for detection of the horizontal and gravity directions of an image, the method comprising: selecting equidistant sampling points in an image at an interval of the radius of the sampling circle of an attention focus detector; placing the center of the sampling circle of the attention focus detector on each of the sampling points, and using the attention focus detector to acquire attention focus coordinates and the corresponding significant orientation angle, and all the attention focus coordinates and the corresponding significant orientation angles constitute a set Ωp; using an orientation perceptron to determine a local orientation angle and a weight at the attention focus according to the gray image information, and generating a local orientation function; obtaining a sum of each of the local orientation functions as an image direction function; obtaining a function MCGCS(β), and further obtaining the horizontal and gravity identification angles.

Patent Agency Ranking