公开(公告)号：US20240332091A1

公开(公告)日：2024-10-03

申请号：US18128119

申请日：2023-03-29

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Shen-Yang LEE ,  Hsiang-Pi Chang ,  Huiching Chang ,  Shao An Wang ,  Kenichi Sano ,  Huang-Lin Chao

IPC: H01L21/8238 ,  H01L21/28 ,  H01L27/092 ,  H01L29/06 ,  H01L29/423 ,  H01L29/49 ,  H01L29/66 ,  H01L29/775

CPC classification number: H01L21/823842 ,  H01L21/28088 ,  H01L21/823807 ,  H01L21/823814 ,  H01L27/092 ,  H01L29/0673 ,  H01L29/42392 ,  H01L29/4908 ,  H01L29/66439 ,  H01L29/775

Abstract: A semiconductor device and a method of fabricating the semiconductor device are disclosed. The method includes forming nanostructured channel regions, forming gate openings surrounding the nanostructured channel regions, forming oxide layers on exposed surfaces of the nanostructured channel regions in the gate openings, depositing a diffusion barrier layer on the oxide layers, depositing a first dielectric layer on the diffusion barrier layer, performing a doping process on the diffusion barrier layer and the first dielectric layer to form a doped diffusion barrier layer and a doped dielectric layer, and depositing a conductive layer on the doped dielectric layer.

公开(公告)号：US20240313064A1

公开(公告)日：2024-09-19

申请号：US18183551

申请日：2023-03-14

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Shen-Yang LEE ,  Hsiang-Pi CHANG ,  Huang-Lin CHAO

IPC: H01L29/40 ,  H01L21/8238 ,  H01L27/092 ,  H01L29/423 ,  H01L29/49 ,  H01L29/66 ,  H01L29/775

CPC classification number: H01L29/401 ,  H01L21/823857 ,  H01L27/092 ,  H01L29/42392 ,  H01L29/4908 ,  H01L29/66439 ,  H01L29/66742 ,  H01L29/775

Abstract: A semiconductor device and a method of fabricating the semiconductor device are disclosed. The method includes forming nanostructured channel regions on a fin or sheet base, forming gate openings surrounding the nanostructured channel regions, forming oxide layers on exposed surfaces of the nanostructured channel regions and the fin or sheet base in the gate openings, performing a first doping process on the oxide layers to form doped oxide layers, depositing a first dielectric layer on the doped oxide layers, performing a second doping process on the first dielectric layer to form a doped dielectric layer, and depositing a conductive layer on the doped dielectric layer.

公开(公告)号：US20240297239A1

公开(公告)日：2024-09-05

申请号：US18177911

申请日：2023-03-03

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Shen-Yang LEE ,  Chun-Fu Lu ,  Hsiang-Pi Chang

IPC: H01L29/66 ,  H01L21/8234 ,  H01L29/06 ,  H01L29/08 ,  H01L29/423 ,  H01L29/775 ,  H01L29/786

CPC classification number: H01L29/6656 ,  H01L21/823412 ,  H01L21/823418 ,  H01L21/823431 ,  H01L21/823468 ,  H01L29/0673 ,  H01L29/0847 ,  H01L29/42392 ,  H01L29/66439 ,  H01L29/775 ,  H01L29/78696

Abstract: A semiconductor device and a method of fabricating the semiconductor device are disclosed. The method includes forming a fin base on a substrate, forming a superlattice structure including first and second nanostructured layers on the fin base, forming a polysilicon structure on the superlattice structure, epitaxially growing a S/D region on the fin base and adjacent to the first nanostructured layer, forming an oxygen-rich outer gate spacer including a first dielectric material with a first non-stoichiometric composition on a sidewall of the polysilicon structure, forming an oxygen-rich inner gate spacer including a second dielectric material with a second non-stoichiometric composition on a sidewall of the second nanostructured layer, and replacing the polysilicon structure with a gate structure.

公开(公告)号：US20240405093A1

公开(公告)日：2024-12-05

申请号：US18328502

申请日：2023-06-02

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Shen-Yang LEE ,  Hsiang-Pi CHANG ,  Huang-Lin CHAO ,  Pinyen LIN

IPC: H01L29/51 ,  H01L21/3115 ,  H01L29/06 ,  H01L29/423 ,  H01L29/66 ,  H01L29/775

Abstract: The present disclosure describes forming a crystalline high-k dielectric layer at a reduced crystallization temperature in a semiconductor device. The method includes forming a channel structure on a substrate, forming an interfacial layer on the channel structure, forming a first high-k dielectric layer on the interfacial layer, forming dipoles in the first high-k dielectric layer with a dopant, and forming a second high-k dielectric layer on the first high-k dielectric layer. The dopant includes a first metal element. The second high-k dielectric layer includes a second metal element different from the first metal element.