NONVOLATILE MEMORY DEVICE AND OPERATING METHOD OF NONVOLATILE MEMORY DEVICE

    公开(公告)号:US20240282377A1

    公开(公告)日:2024-08-22

    申请号:US18441331

    申请日:2024-02-14

    CPC classification number: G11C16/08 G11C16/0433 G11C16/32

    Abstract: Provided is an operating method of a nonvolatile memory device including a plurality of cell strings, each cell string of the plurality of cell strings including a plurality of memory cells, connected between a bit line and a common source line, and vertical holes penetrating a plurality of word lines stacked in a direction perpendicular to a substrate, the operating method including applying a word line voltage to the plurality of word lines, classifying the plurality of word lines into a plurality of regions, each region of the plurality of regions including at least one of the word lines, and recovering voltages of the plurality of word lines by recovering voltages of word lines arranged in a central region among the plurality of regions before recovering voltages of word lines in other regions of the plurality of regions.

    IMAGE SENSOR WITH STACK STRUCTURE AND MANUFACTURING METHOD THEREOF

    公开(公告)号:US20240258347A1

    公开(公告)日:2024-08-01

    申请号:US18524723

    申请日:2023-11-30

    CPC classification number: H01L27/14623 H01L27/14645 H01L27/14621

    Abstract: An image sensor may include a first semiconductor chip including a pixel area and a peripheral area, the pixel area including a plurality of pixels, and a second semiconductor chip coupled to a lower surface of the first semiconductor chip, the second semiconductor chip including a plurality of logic elements, the pixel area including a plurality of color filters and a fence in the pixel area, the plurality of color filters corresponding to the plurality of pixels, the fence having a grid pattern, and each of the color filters of the plurality of color filters separated from each other by the fence, the peripheral area including a shield area and a shield outer area, the shield area surrounding the pixel area, and a fence insulating layer included in the shield outer area, the fence insulating layer including a same material as the fence.

    MEMORY DEVICE WITH IMPROVED THRESHOLD VOLTAGE DISTRIBUTION AND OPERATING METHOD THEREOF

    公开(公告)号:US20240161842A1

    公开(公告)日:2024-05-16

    申请号:US18338857

    申请日:2023-06-21

    CPC classification number: G11C16/3459 G11C16/102

    Abstract: Provided is a memory device with improved threshold voltage distribution and an operating method of the memory device. The memory device includes a memory cell array including a plurality of memory cells, a voltage generator configured to generate a program voltage and a verification voltage applied to the plurality of memory cells during a data write operation, and a control logic configured to control multiple program loops to program the memory cells to multiple program states during the data write operation and configured to determine whether programming passes or fails in the multiple program loops, wherein the control logic controls the program loops to verify one or more (n+1)-th memory cells to be programmed to an (n+1)-th program state by using a verify condition for verifying an n-th program state in at least one of the multiple program loops (n is an integer greater than or equal to 1).

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