-
公开(公告)号:US11380711B2
公开(公告)日:2022-07-05
申请号:US17154583
申请日:2021-01-21
Applicant: Samsung Electronics Co., Ltd.
Inventor: Sohyeon Lee , Sungsu Moon , Jaeduk Lee , Ikhyung Joo
IPC: H01L27/12 , H01L21/84 , H01L29/08 , H01L29/78 , H01L29/417 , H01L29/423 , H01L29/786 , H01L27/088 , H01L21/8234
Abstract: A semiconductor device includes a substrate having an active region defined by a device isolation film and providing a first channel region; a first source/drain region in the active region on first and second sides of the first channel region; a gate structure having a first gate insulating film, a shared gate electrode, and a second gate insulating film, sequentially arranged on the active region; a cover semiconductor layer on the second gate insulating film and electrically separated from the active region to provide a second channel region; a second source/drain region in the cover semiconductor layer on first and second sides of the second channel region first and second source/drain contacts respectively connected to the first and second source/drain regions; and a shared gate contact connected to the shared gate electrode.
-
公开(公告)号:US12080799B2
公开(公告)日:2024-09-03
申请号:US17715887
申请日:2022-04-07
Applicant: Samsung Electronics Co., Ltd.
Inventor: Sohyeon Lee , Sungsu Moon , Jaeduk Lee , Ikhyung Joo
IPC: H01L29/78 , H01L29/06 , H01L29/786
CPC classification number: H01L29/78603 , H01L29/0607
Abstract: A semiconductor device includes a substrate having a recess therein that is partially filled with at least two semiconductor active regions. The recess has sidewalls and a bottom that are sufficiently lined with corresponding substrate insulating layers that the at least two semiconductor active regions are electrically isolated from the substrate, which surrounds the sidewalls and bottom of the recess. A sidewall insulating layer is provided, which extends as a partition between first and second ones of the at least two semiconductor active regions, such that the first and second ones of the at least two semiconductor active regions are electrically isolated from each other. First and second gate electrodes are provided in the first and second active regions, respectively.
-
公开(公告)号:US11916078B2
公开(公告)日:2024-02-27
申请号:US17854128
申请日:2022-06-30
Applicant: Samsung Electronics Co., Ltd.
Inventor: Sohyeon Lee , Sungsu Moon , Jaeduk Lee , Ikhyung Joo
IPC: H01L27/12 , H01L21/8234 , H01L21/84 , H01L27/088 , H01L29/08 , H01L29/417 , H01L29/423 , H01L29/78 , H01L29/786
CPC classification number: H01L27/1207 , H01L21/823431 , H01L21/823437 , H01L21/823456 , H01L21/823487 , H01L21/84 , H01L27/0886 , H01L29/0843 , H01L29/41733 , H01L29/41791 , H01L29/4236 , H01L29/42392 , H01L29/7831 , H01L29/785 , H01L29/78642 , H01L29/78696
Abstract: A semiconductor device includes a substrate having an active region defined by a device isolation film and providing a first channel region; a first source/drain region in the active region on first and second sides of the first channel region; a gate structure having a first gate insulating film, a shared gate electrode, and a second gate insulating film, sequentially arranged on the active region; a cover semiconductor layer on the second gate insulating film and electrically separated from the active region to provide a second channel region; a second source/drain region in the cover semiconductor layer on first and second sides of the second channel region; first and second source/drain contacts respectively connected to the first and second source/drain regions; and a shared gate contact connected to the shared gate electrode.
-
公开(公告)号:US20220376116A1
公开(公告)日:2022-11-24
申请号:US17715887
申请日:2022-04-07
Applicant: Samsung Electronics Co., Ltd.
Inventor: Sohyeon Lee , Sungsu Moon , Jaeduk Lee , Ikhyung Joo
IPC: H01L29/786 , H01L29/06
Abstract: A semiconductor device includes a substrate having a recess therein that is partially filled with at least two semiconductor active regions. The recess has sidewalls and a bottom that are sufficiently lined with corresponding substrate insulating layers that the at least two semiconductor active regions are electrically isolated from the substrate, which surrounds the sidewalls and bottom of the recess. A sidewall insulating layer is provided, which extends as a partition between first and second ones of the at least two semiconductor active regions, such that the first and second ones of the at least two semiconductor active regions are electrically isolated from each other. First and second gate electrodes are provided in the first and second active regions, respectively.
-
公开(公告)号:US20220336501A1
公开(公告)日:2022-10-20
申请号:US17854128
申请日:2022-06-30
Applicant: Samsung Electronics Co., Ltd.
Inventor: Sohyeon Lee , Sungsu Moon , Jaeduk Lee , Ikhyung Joo
IPC: H01L27/12 , H01L21/84 , H01L29/08 , H01L29/78 , H01L29/417 , H01L29/423 , H01L29/786 , H01L27/088 , H01L21/8234
Abstract: A semiconductor device includes a substrate having an active region defined by a device isolation film and providing a first channel region; a first source/drain region in the active region on first and second sides of the first channel region; a gate structure having a first gate insulating film, a shared gate electrode, and a second gate insulating film, sequentially arranged on the active region; a cover semiconductor layer on the second gate insulating film and electrically separated from the active region to provide a second channel region; a second source/drain region in the cover semiconductor layer on first and second sides of the second channel region; first and second source/drain contacts respectively connected to the first and second source/drain regions; and a shared gate contact connected to the shared gate electrode.
-
公开(公告)号:US10396088B2
公开(公告)日:2019-08-27
申请号:US15696276
申请日:2017-09-06
Applicant: Samsung Electronics Co., Ltd.
Inventor: Sohyeon Lee , Sunil Shim , Jaeduk Lee , Jaehoon Jang , Jeehoon Han
IPC: H01L27/11565 , H01L27/1157 , H01L27/11582 , H01L23/52 , H01L23/528 , H01L21/768 , H01L23/522
Abstract: A three-dimensional semiconductor device and a method of manufacturing the same are provided. The three-dimensional semiconductor device includes a stack structure including insulating layers and electrodes that are alternately stacked on a substrate, a horizontal semiconductor pattern between the substrate and the stack structure, vertical semiconductor patterns penetrating the stack structure and connected to the horizontal semiconductor pattern; and a common source plug at a side of the stack structure. The stack structure, the horizontal semiconductor pattern and the common source plug extend in a first direction. The horizontal semiconductor pattern includes a first sidewall extending in the first direction. The first sidewall has protrusions protruding toward the common source plug.
-
-
-
-
-