公开(公告)号：US12125535B2

公开(公告)日：2024-10-22

申请号：US17698627

申请日：2022-03-18

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Kwanyong Kim ,  Sunil Shim ,  Wonseok Cho

IPC: G11C16/08 ,  G11C16/04

CPC classification number: G11C16/08 ,  G11C16/0466 ,  G11C16/0483

Abstract: An integrated circuit device includes a plurality of word lines, a string selection line structure stacked on the plurality of word lines, and a plurality of channel structures extending in a vertical direction through the plurality of word lines and the string selection line structure. The string selection line structure includes a string selection bent line including a lower horizontal extension portion extending in a horizontal direction at a first level higher than the plurality of word lines, an upper horizontal extension portion extending in the horizontal direction at a second level higher than the first level, and a vertical extension portion connected between the lower horizontal extension portion and the upper horizontal extension portion.

公开(公告)号：US11637117B2

公开(公告)日：2023-04-25

申请号：US17032277

申请日：2020-09-25

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hyojoon Ryu ,  Kwanyong Kim ,  Seogoo Kang ,  Sunil Shim ,  Wonseok Cho ,  Jeehon Han

IPC: H01L27/1157 ,  H01L23/522 ,  H01L27/11573 ,  H01L27/11582 ,  H01L27/11565

Abstract: A semiconductor device includes; a memory stack disposed on a substrate and including a lower gate electrode, an upper gate stack including a string selection line, a vertically extending memory gate contact disposed on the lower gate electrode, and a vertically extending selection line stud disposed on the string selection line. The string selection line includes a material different from that of the lower gate electrode, and the selection line stud includes a material different from that of the memory gate contact.

公开(公告)号：US11295815B2

公开(公告)日：2022-04-05

申请号：US16781986

申请日：2020-02-04

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Kwanyong Kim ,  Sunil Shim ,  Wonseok Cho

IPC: G11C16/08 ,  G11C16/04

Abstract: An integrated circuit device includes a plurality of word lines, a string selection line structure stacked on the plurality of word lines, and a plurality of channel structures extending in a vertical direction through the plurality of word lines and the string selection line structure. The string selection line structure includes a string selection bent line including a lower horizontal extension portion extending in a horizontal direction at a first level higher than the plurality of word lines, an upper horizontal extension portion extending in the horizontal direction at a second level higher than the first level, and a vertical extension portion connected between the lower horizontal extension portion and the upper horizontal extension portion.

公开(公告)号：US11887936B2

公开(公告)日：2024-01-30

申请号：US17469952

申请日：2021-09-09

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Kwanyong Kim ,  Sungwon Shin ,  Seungmin Lee ,  Juyoung Lim ,  Wonseok Cho

IPC: H01L23/544 ,  H01L23/532 ,  H01L23/528 ,  H10B41/46

CPC classification number: H01L23/544 ,  H01L23/5283 ,  H01L23/53295 ,  H10B41/46

Abstract: A semiconductor device includes a first stack structure on a substrate, and a second stack structure on the first stack structure. A channel structure extends through the first stack structure and the second stack structure. A first auxiliary stack structure including a plurality of first insulating layers and a plurality of first mold layers are alternately stacked on the substrate. An alignment key extends into the first auxiliary stack structure and protrudes to a higher level than an uppermost end of the first stack structure. A second auxiliary stack structure is disposed on the first auxiliary stack structure and the alignment key, and includes a plurality of second insulating layers and a plurality of second mold layers alternately stacked. The second auxiliary stack structure includes a protrusion aligned with the alignment key.

公开(公告)号：US11800712B2

公开(公告)日：2023-10-24

申请号：US17339129

申请日：2021-06-04

Applicant: Samsung Electronics Co., Ltd.

Inventor： Juyeon Jung ,  Kwanyong Kim ,  Haemin Lee ,  Juyoung Lim ,  Wonseok Cho

IPC: H01L27/11582 ,  H10B43/27 ,  H10B41/10 ,  H10B41/27 ,  H10B41/35 ,  H10B41/40 ,  H10B43/10 ,  H10B43/35 ,  H10B43/40

CPC classification number: H10B43/27 ,  H10B41/10 ,  H10B41/27 ,  H10B41/35 ,  H10B41/40 ,  H10B43/10 ,  H10B43/35 ,  H10B43/40

Abstract: A semiconductor memory device includes a substrate having a first region, a second region, and a third region main separation regions extending in the first direction and apart from each other in a second direction, first auxiliary separation regions extending in the first direction and spaced apart from each other in the second direction, and second auxiliary separation regions extending in the first direction and spaced apart from each other in the second direction. The first auxiliary separation regions are at a first pitch in the second direction between the main separation regions, the second auxiliary separation regions are disposed at a second pitch, smaller than the first pitch in the second direction between the main separation regions, and the first auxiliary separation regions and the second auxiliary separation regions are shifted from each other in the second direction.