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公开(公告)号：US10854622B2
公开(公告)日：2020-12-01
申请号：US16886021
申请日：2020-05-28
Applicant: Samsung Electronics Co., Ltd.
Inventor： Young-Bae Yoon , Joong-Shik Shin , Kwang-Ho Kim , Hyun-Mog Park
IPC: H01L27/11565 , H01L27/11582 , H01L27/11578 , H01L27/11568 , H01L27/11575
Abstract: A vertical memory device includes a channel, gate lines, and a cutting pattern, respectively, on a substrate. The channel extends in a first direction substantially perpendicular to an upper surface of the substrate. The gate lines are spaced apart from each other in the first direction. Each of the gate lines surrounds the channel and extends in a second direction substantially parallel to the upper surface of the substrate. The cutting pattern includes a first cutting portion extending in the first direction and cutting the gate lines, and a second cutting portion crossing the first cutting portion and merged with the first cutting portion.
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2.发明申请公开(公告)号：US20170023966A1
公开(公告)日：2017-01-26
申请号：US15166392
申请日：2016-05-27
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： JOO-SEONG KIM , Sang-Ho Kim , Kwang-Ho Kim
CPC classification number: G05F3/245 , G01K7/01 , G01K15/005 , G01R31/2851 , G05F3/262
Abstract: A semiconductor device includes: an integrated circuit (IC) including an internal circuit; and a mismatch detection and correction circuit connected to the internal circuit of the IC, the mismatch detection and correction circuit configured to detect a process mismatch and correct an error in the internal circuit caused by the process mismatch using a current difference between a first current and a second current based on a charged voltage of a capacitor.
Abstract translation: 一种半导体器件包括：包括内部电路的集成电路（IC）; 以及连接到IC的内部电路的失配检测和校正电路，所述失配检测和校正电路被配置为检测过程失配并且使用第一电流和第一电流之间的电流差校正由所述过程失配引起的内部电路中的误差 基于电容器的充电电压的第二电流。
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公开(公告)号：US11231736B2
公开(公告)日：2022-01-25
申请号：US16186753
申请日：2018-11-12
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Joo-Seong Kim , Kwang-Ho Kim , Sang-Ho Kim
Abstract: A reference voltage generating circuit includes: an operational amplifier including a first input terminal connected to a first node and a second input terminal connected to a second node; a first transistor connected between a ground terminal and the first node, wherein a first current flows in the first transistor; a second transistor connected to the ground terminal; and a first variable resistor connected between the second transistor and the second node, wherein the first variable resistor has a first resistance value for adjusting the first current, based on a change in a current characteristic of the first transistor caused by a variation in a process of forming the first transistor. The reference voltage generating circuit provides a reference voltage, based on a voltage of the first node and a voltage across the first variable resistor.
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公开(公告)号：US20180308559A1
公开(公告)日：2018-10-25
申请号：US15842029
申请日：2017-12-14
Applicant: Samsung Electronics Co., Ltd.
Inventor： Kwang-Ho Kim , Jihwan Yu , Seunghyun Cho
IPC: G11C19/28 , G11C11/412 , G11C8/14 , H01L27/11578
CPC classification number: G11C19/28 , G11C5/025 , G11C8/14 , G11C11/412 , H01L27/11565 , H01L27/1157 , H01L27/11573 , H01L27/11575 , H01L27/11578 , H01L27/11582
Abstract: Disclosed is a three-dimensional semiconductor device including a stack structure on a substrate and including electrodes that are vertically stacked on top of each other on a first region of a substrate, a vertical structure penetrating the stack structure and including a first semiconductor pattern, a data storage layer between the first semiconductor pattern and at least one of the electrodes, a transistor on a second region of the substrate, and a first contact coupled to the transistor. The first contact includes a first portion and a second portion on the first portion. Each of the first portion and the second portions has a diameter that increases with an increasing vertical distance from the substrate. A diameter of an upper part of the first portion is greater than a diameter of a lower part of the second portion.
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5.发明授权公开(公告)号：US09348521B2
公开(公告)日：2016-05-24
申请号：US14504568
申请日：2014-10-02
Applicant: Samsung Electronics Co., Ltd.
Inventor： Han-Bin Yoon , Yeong-jae Woo , Dong-gi Lee , Kwang-Ho Kim , Hyuck-Sun Kwon
CPC classification number: G06F3/0616 , G06F3/0613 , G06F3/0653 , G06F3/0659 , G06F3/0679 , G06F13/1668 , G06F2206/1014
Abstract: A semiconductor storage device and a method of throttling performance of the same are provided. The semiconductor storage device includes a non-volatile memory device; and a controller configured to receive a write command from a host and program write data received from the host to the non-volatile memory device in response to the write command. The controller inserts idle time after receiving the write data from the host and/or after programming the write data to the non-volatile memory device.
Abstract translation: 提供半导体存储装置及其节流方法。 半导体存储装置包括非易失性存储装置; 以及控制器，被配置为从主机接收写入命令，并且响应于写入命令将程序写入从主机接收到非易失性存储器设备的数据。 控制器在接收到来自主机的写入数据和/或在将写入数据编程到非易失性存储器件之后插入空闲时间。
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Patent Agency Ranking
公开(公告)号：US10748634B2
公开(公告)日：2020-08-18
申请号：US16417834
申请日：2019-05-21
Applicant: Samsung Electronics Co., Ltd.
Inventor： Kwang-Ho Kim , Jihwan Yu , Seunghyun Cho
IPC: G11C19/28 , H01L27/11578 , G11C8/14 , G11C11/412 , H01L27/11565 , H01L27/1157 , H01L27/11573 , H01L27/11575 , H01L27/11582 , G11C5/02
Abstract: Disclosed is a three-dimensional semiconductor device including a stack structure on a substrate and including electrodes that are vertically stacked on top of each other on a first region of a substrate, a vertical structure penetrating the stack structure and including a first semiconductor pattern, a data storage layer between the first semiconductor pattern and at least one of the electrodes, a transistor on a second region of the substrate, and a first contact coupled to the transistor. The first contact includes a first portion and a second portion on the first portion. Each of the first portion and the second portions has a diameter that increases with an increasing vertical distance from the substrate. A diameter of an upper part of the first portion is greater than a diameter of a lower part of the second portion.
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公开(公告)号：US10354740B2
公开(公告)日：2019-07-16
申请号：US15842029
申请日：2017-12-14
Applicant: Samsung Electronics Co., Ltd.
Inventor： Kwang-Ho Kim , Jihwan Yu , Seunghyun Cho
IPC: G11C19/28 , H01L27/11578 , G11C8/14 , G11C11/412 , H01L27/11565 , H01L27/1157 , H01L27/11573 , H01L27/11575 , H01L27/11582 , G11C5/02
Abstract: Disclosed is a three-dimensional semiconductor device including a stack structure on a substrate and including electrodes that are vertically stacked on top of each other on a first region of a substrate, a vertical structure penetrating the stack structure and including a first semiconductor pattern, a data storage layer between the first semiconductor pattern and at least one of the electrodes, a transistor on a second region of the substrate, and a first contact coupled to the transistor. The first contact includes a first portion and a second portion on the first portion. Each of the first portion and the second portions has a diameter that increases with an increasing vertical distance from the substrate. A diameter of an upper part of the first portion is greater than a diameter of a lower part of the second portion.
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公开(公告)号：US10547108B2
公开(公告)日：2020-01-28
申请号：US15698538
申请日：2017-09-07
Applicant: Samsung Electronics Co., Ltd.
Inventor： Sin-Hyung Jeon , Kwang-Ho Kim , Sang-Gi Oh , Sang-Hyuk Wi , Dong-Hyun Jeong , Jeong-Nam Cheon
Abstract: Various embodiments of the present disclosure provide an antenna device and/or an electronic device including the antenna device. The antenna device may include: a circuit board; a conductive layer disposed in a partial region of the circuit board; a first radiation conductor disposed at one side of the conductive layer on the circuit board; and second radiation conductors disposed at one side of the conductive layer on the circuit board, the second radiation conductors being respectively disposed at opposite sides of the first radiation conductor to be symmetrical to each other. The first radiation conductor may transmit or receive a wireless signal in a first frequency band, and the second radiation conductors may transmit or receive a wireless signal in a second frequency band that is different from the first frequency band.
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9.发明授权公开(公告)号：US09917240B2
公开(公告)日：2018-03-13
申请号：US14740466
申请日：2015-06-16
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Kwang-Ho Kim , Jun-Hyeok Yang , Hyung-Jong Ko , Se-Ki Kim , Ho-Jin Park , Se-Ra An
CPC classification number: H01L35/32 , H01L25/18 , H01L27/16 , H01L2924/0002 , Y10S257/93
Abstract: A thermoelectric element is provided as follows. First and second semiconductor fin structures are disposed on a semiconductor substrate. Each semiconductor fin structure extends in a first direction, protruding from the semiconductor substrate. First and second semiconductor nanowires are disposed on the first and second semiconductor fin structures, respectively. The first semiconductor nanowires include first impurities. The second semiconductor nanowires include second impurities different from the first impurities. A first electrode is connected to first ends of the first and second semiconductor nanowires. A second electrode is connected to second ends of the first semiconductor nanowires. A third electrode is connected to second ends of the second semiconductor nanowires.
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公开(公告)号：US10310536B2
公开(公告)日：2019-06-04
申请号：US15166392
申请日：2016-05-27
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Joo-Seong Kim , Sang-Ho Kim , Kwang-Ho Kim
Abstract: A semiconductor device includes: an integrated circuit (IC) including an internal circuit; and a mismatch detection and correction circuit connected to the internal circuit of the IC, the mismatch detection and correction circuit configured to detect a process mismatch and correct an error in the internal circuit caused by the process mismatch using a current difference between a first current and a second current based on a charged voltage of a capacitor.
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