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    Enhanced dynamic memory management with intelligent current/power consumption minimization
    2.
    发明授权
    Enhanced dynamic memory management with intelligent current/power consumption minimization 有权

    公开(公告)号：US09760149B2

    公开(公告)日：2017-09-12

    申请号：US13736268

    申请日：2013-01-08

    Applicant: QUALCOMM Incorporated

    Inventor： Hee Jun Park ,  Richard Gerard Hofmann ,  Yong Ju Lee

    IPC: G06F1/32 ,  G06F13/16

    CPC classification number: G06F1/3225 ,  G06F1/3287 ,  G06F13/1668 ,  Y02D10/171

    Abstract: A low-power state current/power consumption for each volatile memory device in a plurality of volatile memory devices is obtained. Data is copied from a first set of the volatile memory devices to a second set of the volatile memory devices, where the second set of volatile memory devices has a lower current/power consumption than the first set of volatile memory devices. Additionally, a current/power consumption may be obtained for each memory bank within each of the plurality of volatile memory devices. Data is then copied from a first set of memory banks to a second set of memory banks within the same memory device in the second set of memory devices, where the second set of memory banks has lower current/power consumption than the first set of memory banks. The first set of volatile memory devices and/or first set of memory banks are then placed into a power-down state.

    LASER ANNEALING METHODS FOR INTEGRATED CIRCUITS (ICs)
    3.
    发明申请
    LASER ANNEALING METHODS FOR INTEGRATED CIRCUITS (ICs) 审中-公开
    集成电路（IC）的激光退火方法

    公开(公告)号：US20150111341A1

    公开(公告)日：2015-04-23

    申请号：US14149882

    申请日：2014-01-08

    Applicant: QUALCOMM Incorporated

    Inventor： Yong Ju Lee ,  Yang Du

    IPC: H01L21/268 ,  H01L21/324

    CPC classification number: H01L21/268 ,  H01L21/324 ,  H01L21/8221 ,  H01L27/0688

    Abstract: Laser annealing methods for integrated circuits (IC) are disclosed. In particular, an upper surface of an integrated circuit is annealed with a laser using a brief burst of light from the laser. In an exemplary embodiment, the brief burst of light from the laser lasts approximately fifty (50) to five hundred (500) microseconds. This brief burst will raise the temperature of the surface to approximately 1200° C.

    Abstract translation: 公开了集成电路（IC）的激光退火方法。 特别地，使用来自激光器的短暂的光源，使用激光器对集成电路的上表面进行退火。 在示例性实施例中，来自激光器的短暂的光脉冲持续大约五十（50）至五百（500）微秒。 这种短暂的爆发会使表面的温度升高到大约1200℃

    THERMALLY CONSCIOUS STANDARD CELLS
    4.
    发明申请
    THERMALLY CONSCIOUS STANDARD CELLS 审中-公开

    公开(公告)号：US20190103394A1

    公开(公告)日：2019-04-04

    申请号：US15719877

    申请日：2017-09-29

    Applicant: QUALCOMM Incorporated

    Inventor： Sean Charles Andrews ,  Yong Ju Lee

    IPC: H01L27/02 ,  H01L23/373 ,  H01L23/532

    Abstract: In certain aspects, an integrated circuit comprises a first standard cell having a height equal to a cell height, wherein the first standard cell comprises a first dielectric material in a first layer. The integrated circuit comprises a second standard cell having a height equal to the cell height and aligning with the first standard cell, wherein the second standard cell comprises the first dielectric material in the first layer. The integrated circuit further comprises a first thermal cell having a height equal to the cell height and aligning with and abutting to both the first standard cell and the second standard cell; and wherein the first thermal cell comprises a second dielectric material in the first layer having a higher thermal conductivity than that of the first dielectric material.

    ENHANCED DYNAMIC MEMORY MANAGEMENT WITH INTELLIGENT CURRENT/POWER CONSUMPTION MINIMIZATION
    6.
    发明申请
    ENHANCED DYNAMIC MEMORY MANAGEMENT WITH INTELLIGENT CURRENT/POWER CONSUMPTION MINIMIZATION 有权
    具有智能电流/功耗最小化的增强动态内存管理

    公开(公告)号：US20140195837A1

    公开(公告)日：2014-07-10

    申请号：US13736268

    申请日：2013-01-08

    Applicant: QUALCOMM INCORPORATED

    Inventor： Hee Jun Park ,  Richard Gerard Hofmann ,  Yong Ju Lee

    IPC: G06F1/32

    CPC classification number: G06F1/3225 ,  G06F1/3287 ,  G06F13/1668 ,  Y02D10/171

    Abstract: A low-power state current/power consumption for each volatile memory device in a plurality of volatile memory devices is obtained. Data is copied from a first set of the volatile memory devices to a second set of the volatile memory devices, where the second set of volatile memory devices has a lower current/power consumption than the first set of volatile memory devices. Additionally, a current/power consumption may be obtained for each memory bank within each of the plurality of volatile memory devices. Data is then copied from a first set of memory banks to a second set of memory banks within the same memory device in the second set of memory devices, where the second set of memory banks has lower current/power consumption than the first set of memory banks. The first set of volatile memory devices and/or first set of memory banks are then placed into a power-down state.

    Abstract translation: 获得了多个易失性存储器件中的每个易失性存储器件的低功率状态电流/功率消耗。 将数据从第一组易失性存储器件复制到第二组易失性存储器件，其中第二组易失性存储器件具有比第一组易失性存储器件低的电流/功率消耗。 此外，可以为多个易失性存储器件的每一个内的每个存储器组获得电流/功率消耗。 然后将数据从第一组存储器组复制到第二组存储器件中的相同存储器件中的第二组存储器组，其中第二组存储器组具有比第一组存储器更低的电流/功率消耗 银行。 然后将第一组易失性存储器件和/或第一组存储器组置于掉电状态。

    Noise improvement in DNA sequencing circuit by FinFET-like nanopore formation
    7.
    发明授权
    Noise improvement in DNA sequencing circuit by FinFET-like nanopore formation 有权

    公开(公告)号：US10724065B2

    公开(公告)日：2020-07-28

    申请号：US15438734

    申请日：2017-02-21

    Applicant: QUALCOMM Incorporated

    Inventor： Yong Ju Lee ,  Joung Won Park

    IPC: H01L29/417 ,  C12Q1/00 ,  C12Q1/6874 ,  G01N27/414 ,  G01N33/487 ,  C12Q1/6869

    Abstract: The disclosure generally relates to a deoxyribonucleic acid (DNA) sequencing circuit having a controllable pore size and a lower membrane capacitance and noise floor relative to biological nanopore devices. For example, design principles used to fabricate a fin-shaped field effect transistor (FinFET) may be applied to form, on a first wafer, a nanopore that has a desired pore size in a silicon-based membrane. Electrodes and an interconnect embedded with an amplifier and analog-to-digital converter (ADC) may be formed on a separate second wafer, wherein the first wafer and the second wafer may then be bonded and further processed to form a sensing device that includes appropriate wells and pores to be used in a DNA sequencing circuit.

    Enhanced dynamic memory management with intelligent current/power consumption minimization
    9.
    发明授权
    Enhanced dynamic memory management with intelligent current/power consumption minimization 有权

    公开(公告)号：US10429915B2

    公开(公告)日：2019-10-01

    申请号：US15666643

    申请日：2017-08-02

    Applicant: QUALCOMM Incorporated

    Inventor： Hee Jun Park ,  Richard Gerard Hofmann ,  Yong Ju Lee

    IPC: G06F1/3225 ,  G06F13/16 ,  G06F1/3287

    Abstract: A low-power state current/power consumption for each volatile memory device in a plurality of volatile memory devices is obtained. Data is copied from a first set of the volatile memory devices to a second set of the volatile memory devices, where the second set of volatile memory devices has a lower current/power consumption than the first set of volatile memory devices. Additionally, a current/power consumption may be obtained for each memory bank within each of the plurality of volatile memory devices. Data is then copied from a first set of memory banks to a second set of memory banks within the same memory device in the second set of memory devices, where the second set of memory banks has lower current/power consumption than the first set of memory banks. The first set of volatile memory devices and/or first set of memory banks are then placed into a power-down state.

    TRANSISTORS WITH IMPROVED THERMAL CONDUCTIVITY
    10.
    发明申请
    TRANSISTORS WITH IMPROVED THERMAL CONDUCTIVITY 审中-公开
    具有改善的导热性的晶体管

    公开(公告)号：US20150311138A1

    公开(公告)日：2015-10-29

    申请号：US14264229

    申请日：2014-04-29

    Applicant: QUALCOMM Incorporated

    Inventor： Yong Ju Lee ,  Yang Du

    IPC: H01L23/373 ,  H01L29/51 ,  H01L29/06 ,  H01L29/78

    CPC classification number: H01L29/0653 ,  H01L23/367 ,  H01L23/3731 ,  H01L27/1203 ,  H01L27/1211 ,  H01L29/517 ,  H01L29/518 ,  H01L29/785 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: Transistors with improved thermal conductivity are disclosed. Portions of the transistor or elements adjacent to the transistor are made from materials that are electrically insulative, but have high thermal conductivities. Increased thermal conductivity provides increased heat dissipation from the transistor, which results in less resistance and less power consumption, which in turns generally improves performance. For example, in a first non-limiting exemplary aspect, the material that can be included for electrical insulation, but having high thermal conductivity for increased heat dissipation is Beryllium Oxide (BeO). In a second non-limiting exemplary aspect, the material that can be included for electrical insulation, but having high thermal conductivity for increased heat dissipation is Aluminum Nitride (AlN).

    Abstract translation: 公开了具有改善的热导率的晶体管。 与晶体管相邻的晶体管或元件的部分由电绝缘但具有高导热性的材料制成。 增加的热导率提高了晶体管的散热，这导致较少的电阻和更少的功耗，而这通常会改善性能。 例如，在第一非限制性示例性方面，可以包括用于电绝缘但具有高热导率以增加散热的材料是氧化铍（BeO）。 在第二非限制性示例性方面，可以包括用于电绝缘但具有高导热性以增加散热的材料是氮化铝（AlN）。

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