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    Processing data stream modification to reduce power effects during parallel processing
    1.
    发明授权
    Processing data stream modification to reduce power effects during parallel processing 有权

    公开(公告)号：US11507423B2

    公开(公告)日：2022-11-22

    申请号：US16834986

    申请日：2020-03-30

    Applicant: QUALCOMM Incorporated

    Inventor： Hee Jun Park ,  Richard Gerard Hofmann

    IPC: G06F9/50 ,  G06N20/00 ,  G06F13/28

    Abstract: Certain aspects of the present disclosure provide a method for performing parallel data processing, including: receiving data for parallel processing from a data processing requestor; generating a plurality of data sub-blocks; determining a plurality of data portions in each data sub-block of the plurality of data sub-blocks; changing an order of the plurality of data portions in at least one data sub-block of the plurality of data sub-blocks; providing the plurality of data sub-blocks, including the at least one data sub-block comprising the changed order of the plurality of data portions, to a plurality of processing units for parallel processing; and receiving processed data associated with the plurality of data sub-blocks from the plurality of processing units.

    Enhanced dynamic memory management with intelligent current/power consumption minimization
    2.
    发明授权
    Enhanced dynamic memory management with intelligent current/power consumption minimization 有权

    公开(公告)号：US09760149B2

    公开(公告)日：2017-09-12

    申请号：US13736268

    申请日：2013-01-08

    Applicant: QUALCOMM Incorporated

    Inventor： Hee Jun Park ,  Richard Gerard Hofmann ,  Yong Ju Lee

    IPC: G06F1/32 ,  G06F13/16

    CPC classification number: G06F1/3225 ,  G06F1/3287 ,  G06F13/1668 ,  Y02D10/171

    Abstract: A low-power state current/power consumption for each volatile memory device in a plurality of volatile memory devices is obtained. Data is copied from a first set of the volatile memory devices to a second set of the volatile memory devices, where the second set of volatile memory devices has a lower current/power consumption than the first set of volatile memory devices. Additionally, a current/power consumption may be obtained for each memory bank within each of the plurality of volatile memory devices. Data is then copied from a first set of memory banks to a second set of memory banks within the same memory device in the second set of memory devices, where the second set of memory banks has lower current/power consumption than the first set of memory banks. The first set of volatile memory devices and/or first set of memory banks are then placed into a power-down state.

    Enhanced dynamic memory management with intelligent current/power consumption minimization
    5.
    发明授权
    Enhanced dynamic memory management with intelligent current/power consumption minimization 有权

    公开(公告)号：US10429915B2

    公开(公告)日：2019-10-01

    申请号：US15666643

    申请日：2017-08-02

    Applicant: QUALCOMM Incorporated

    Inventor： Hee Jun Park ,  Richard Gerard Hofmann ,  Yong Ju Lee

    IPC: G06F1/3225 ,  G06F13/16 ,  G06F1/3287

    Abstract: A low-power state current/power consumption for each volatile memory device in a plurality of volatile memory devices is obtained. Data is copied from a first set of the volatile memory devices to a second set of the volatile memory devices, where the second set of volatile memory devices has a lower current/power consumption than the first set of volatile memory devices. Additionally, a current/power consumption may be obtained for each memory bank within each of the plurality of volatile memory devices. Data is then copied from a first set of memory banks to a second set of memory banks within the same memory device in the second set of memory devices, where the second set of memory banks has lower current/power consumption than the first set of memory banks. The first set of volatile memory devices and/or first set of memory banks are then placed into a power-down state.

    Processing data stream modification to reduce power effects during parallel processing
    6.
    发明授权
    Processing data stream modification to reduce power effects during parallel processing 有权

    公开(公告)号：US11983567B2

    公开(公告)日：2024-05-14

    申请号：US17982574

    申请日：2022-11-08

    Applicant: QUALCOMM Incorporated

    Inventor： Hee Jun Park ,  Richard Gerard Hofmann

    IPC: G06F13/00 ,  G06F9/50 ,  G06F13/28 ,  G06N20/00

    CPC classification number: G06F9/5027 ,  G06F9/5094 ,  G06F13/28 ,  G06N20/00

    Abstract: Certain aspects of the present disclosure provide a method for performing parallel data processing, including: receiving data for parallel processing from a data processing requestor; generating a plurality of data sub-blocks; determining a plurality of data portions in each data sub-block of the plurality of data sub-blocks; changing an order of the plurality of data portions in at least one data sub-block of the plurality of data sub-blocks; providing the plurality of data sub-blocks, including the at least one data sub-block comprising the changed order of the plurality of data portions, to a plurality of processing units for parallel processing; and receiving processed data associated with the plurality of data sub-blocks from the plurality of processing units.

    ENHANCED DYNAMIC MEMORY MANAGEMENT WITH INTELLIGENT CURRENT/POWER CONSUMPTION MINIMIZATION
    8.
    发明申请
    ENHANCED DYNAMIC MEMORY MANAGEMENT WITH INTELLIGENT CURRENT/POWER CONSUMPTION MINIMIZATION 有权
    具有智能电流/功耗最小化的增强动态内存管理

    公开(公告)号：US20140195837A1

    公开(公告)日：2014-07-10

    申请号：US13736268

    申请日：2013-01-08

    Applicant: QUALCOMM INCORPORATED

    Inventor： Hee Jun Park ,  Richard Gerard Hofmann ,  Yong Ju Lee

    IPC: G06F1/32

    CPC classification number: G06F1/3225 ,  G06F1/3287 ,  G06F13/1668 ,  Y02D10/171

    Abstract: A low-power state current/power consumption for each volatile memory device in a plurality of volatile memory devices is obtained. Data is copied from a first set of the volatile memory devices to a second set of the volatile memory devices, where the second set of volatile memory devices has a lower current/power consumption than the first set of volatile memory devices. Additionally, a current/power consumption may be obtained for each memory bank within each of the plurality of volatile memory devices. Data is then copied from a first set of memory banks to a second set of memory banks within the same memory device in the second set of memory devices, where the second set of memory banks has lower current/power consumption than the first set of memory banks. The first set of volatile memory devices and/or first set of memory banks are then placed into a power-down state.

    Abstract translation: 获得了多个易失性存储器件中的每个易失性存储器件的低功率状态电流/功率消耗。 将数据从第一组易失性存储器件复制到第二组易失性存储器件，其中第二组易失性存储器件具有比第一组易失性存储器件低的电流/功率消耗。 此外，可以为多个易失性存储器件的每一个内的每个存储器组获得电流/功率消耗。 然后将数据从第一组存储器组复制到第二组存储器件中的相同存储器件中的第二组存储器组，其中第二组存储器组具有比第一组存储器更低的电流/功率消耗 银行。 然后将第一组易失性存储器件和/或第一组存储器组置于掉电状态。

    Bit inversion for data transmission
    9.
    发明授权
    Bit inversion for data transmission 有权

    公开(公告)号：US11139830B2

    公开(公告)日：2021-10-05

    申请号：US16774472

    申请日：2020-01-28

    Applicant: QUALCOMM Incorporated

    Inventor： Fernand Da Fonseca ,  Tarek Zghal ,  Richard Gerard Hofmann

    IPC: H03M13/09 ,  G06F13/20 ,  H03M13/29

    Abstract: In certain aspects, a method for sending data over a bus comprises: calculating a parity check code for a new data code, wherein the new data code comprises a number of bits in the new data code; calculating a Hamming distance between the new data code and a prior data code; and if the Hamming distance is greater than half of the number of bits in the new data code: inverting the new data code and the parity check code to obtain an inverted new data code and an inverted parity check code; and sending the inverted new data code and the inverted parity check code to the bus.

    ENHANCED DYNAMIC MEMORY MANAGEMENT WITH INTELLIGENT CURRENT/POWER CONSUMPTION MINIMIZATION
    10.
    发明申请
    ENHANCED DYNAMIC MEMORY MANAGEMENT WITH INTELLIGENT CURRENT/POWER CONSUMPTION MINIMIZATION 审中-公开

    公开(公告)号：US20170329385A1

    公开(公告)日：2017-11-16

    申请号：US15666643

    申请日：2017-08-02

    Applicant: QUALCOMM Incorporated

    Inventor： Hee Jun Park ,  Richard Gerard Hofmann ,  Yong Ju Lee

    IPC: G06F1/32 ,  G06F13/16

    CPC classification number: G06F1/3225 ,  G06F1/3287 ,  G06F13/1668 ,  Y02D10/171

    Abstract: A low-power state current/power consumption for each volatile memory device in a plurality of volatile memory devices is obtained. Data is copied from a first set of the volatile memory devices to a second set of the volatile memory devices, where the second set of volatile memory devices has a lower current/power consumption than the first set of volatile memory devices. Additionally, a current/power consumption may be obtained for each memory bank within each of the plurality of volatile memory devices. Data is then copied from a first set of memory banks to a second set of memory banks within the same memory device in the second set of memory devices, where the second set of memory banks has lower current/power consumption than the first set of memory banks. The first set of volatile memory devices and/or first set of memory banks are then placed into a power-down state.

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