公开(公告)号：US11854894B2

公开(公告)日：2023-12-26

申请号：US17112697

申请日：2020-12-04

Applicant: Intel Corporation

Inventor： Valluri R. Rao ,  Patrick Morrow ,  Rishabh Mehandru ,  Doug Ingerly ,  Kimin Jun ,  Kevin O'Brien ,  Paul Fischer ,  Szuya S. Liao ,  Bruce Block

IPC: H01L21/822 ,  H01L21/306 ,  H01L21/683 ,  H01L21/8238 ,  H01L21/66 ,  H01L23/528 ,  H01L23/532 ,  H01L23/00 ,  H01L27/092 ,  H01L27/12 ,  H01L29/04 ,  H01L29/06 ,  H01L29/08 ,  H01L29/16 ,  H01L29/20 ,  H01L29/66 ,  G01R1/073 ,  H01L25/065

CPC classification number: H01L21/8221 ,  H01L21/30625 ,  H01L21/6835 ,  H01L21/823807 ,  H01L21/823814 ,  H01L21/823821 ,  H01L21/823871 ,  H01L21/823878 ,  H01L22/14 ,  H01L23/528 ,  H01L23/53233 ,  H01L24/03 ,  H01L24/05 ,  H01L27/0924 ,  H01L27/1207 ,  H01L29/04 ,  H01L29/0696 ,  H01L29/0847 ,  H01L29/16 ,  H01L29/20 ,  G01R1/07307 ,  H01L24/08 ,  H01L25/0657 ,  H01L27/1214 ,  H01L27/1222 ,  H01L29/66545 ,  H01L2221/68345 ,  H01L2221/68363 ,  H01L2221/68381 ,  H01L2224/08147 ,  H01L2225/06565

Abstract: Integrated circuit cell architectures including both front-side and back-side structures. One or more of back-side implant, semiconductor deposition, dielectric deposition, metallization, film patterning, and wafer-level layer transfer is integrated with front-side processing. Such double-side processing may entail revealing a back side of structures fabricated from the front-side of a substrate. Host-donor substrate assemblies may be built-up to support and protect front-side structures during back-side processing. Front-side devices, such as FETs, may be modified and/or interconnected during back-side processing. Electrical test may be performed from front and back sides of a workpiece. Back-side devices, such as FETs, may be integrated with front-side devices to expand device functionality, improve performance, or increase device density.