公开(公告)号：US20150340402A1

公开(公告)日：2015-11-26

申请号：US14646406

申请日：2013-11-26

Applicant: HAMAMATSU PHOTONICS K.K.

Inventor： Tatsumi YAMANAKA ,  Akira SAKAMOTO ,  Noburo HOSOKAWA

IPC: H01L27/146 ,  H01L31/0224

CPC classification number: H01L27/14663 ,  H01L27/14603 ,  H01L27/14636 ,  H01L31/022408 ,  H01L31/10 ,  H01L31/103

Abstract: A photodiode array includes a plurality of photodiodes formed in a semiconductor substrate. Each of the photodiodes includes a first semiconductor region of a first conductivity type, and provided in the semiconductor substrate, a second semiconductor region of a second conductivity type, provided with respect to the first semiconductor region on one surface side of the semiconductor substrate so as to surround a predetermined region, and constituting a light detection region together with the first semiconductor region, and a through-electrode provided within a through-hole passing through the one surface and the other surface of the semiconductor substrate so as to pass through the first semiconductor region and the predetermined region, and electrically connected to the second semiconductor region. The through-hole includes a portion expanded from the one surface toward the other surface.

Abstract translation: 光电二极管阵列包括形成在半导体衬底中的多个光电二极管。 每个光电二极管包括第一导电类型的第一半导体区域，并且设置在半导体衬底中，相对于半导体衬底的一个表面侧上的第一半导体区域提供第二导电类型的第二半导体区域，以便 围绕预定区域并与第一半导体区域一起构成光检测区域;以及通孔，其设置在穿过半导体衬底的一个表面和另一个表面的通孔内，以穿过第一半导体区域 半导体区域和预定区域，并且电连接到第二半导体区域。 通孔包括从一个表面朝向另一个表面膨胀的部分。

公开(公告)号：US20140110808A1

公开(公告)日：2014-04-24

申请号：US14138950

申请日：2013-12-23

Applicant: HAMAMATSU PHOTONICS K.K.

Inventor： Kazuhisa YAMAMURA ,  Akira SAKAMOTO ,  Terumasa NAGANO ,  Yoshitaka ISHIKAWA ,  Satoshi KAWAI

IPC: H01L27/146

CPC classification number: H01L27/1464 ,  H01L27/1462 ,  H01L27/14625 ,  H01L27/1463 ,  H01L27/14649 ,  H01L27/14689 ,  H01L31/0232 ,  H01L31/0236 ,  H01L31/02363 ,  H01L31/035281 ,  H01L31/103 ,  H01L31/107 ,  H01L2224/48091 ,  Y02E10/50 ,  H01L2924/00014

Abstract: A photodiode array PDA1 is provided with a substrate S wherein a plurality of photodetecting channels CH have an n-type semiconductor layer 32. The photodiode array PDA1 is provided with a p− type semiconductor layer 33 formed on the n-type semiconductor layer 32, resistors 24 provided for the respective photodetecting channels CH and each having one end portion connected to a signal conducting wire 23, and an n-type separating portion 40 formed between the plurality of photodetecting channels CH. The p− type semiconductor layer 33 forms pn junctions at an interface to the n-type semiconductor layer 32 and has a plurality of multiplication regions AM for avalanche multiplication of carriers generated with incidence of detection target light, corresponding to the respective photodetecting channels. An irregular asperity 10 is formed in a surface of the n-type semiconductor layer 32 and the surface is optically exposed.

Abstract translation: 光电二极管阵列PDA1设置有基板S，其中多个受光通道CH具有n型半导体层32.光电二极管阵列PDA1设置有形成在n型半导体层32上的p型半导体层33，电阻 设置在相应的光检测通道CH上，每个具有连接到信号导线23的一个端部，以及形成在多个光电检测通道CH之间的n型分离部分40。 p型半导体层33在与n型半导体层32的界面处形成pn结，并且具有多个乘法区域AM，用于对应于各个受光通道而与检测目标光入射产生的载流子的雪崩乘法。 在n型半导体层32的表面上形成不规则的凹凸10，并且该表面被光学曝光。

公开(公告)号：US20170200693A1

公开(公告)日：2017-07-13

申请号：US15320835

申请日：2015-08-05

Applicant: HAMAMATSU PHOTONICS K.K.

Inventor： Yoshimaro FUJII ,  Hiroshi OGURI ,  Akira SAKAMOTO ,  Tomoya TAGUCHI

IPC: H01L23/00 ,  H01L31/0216 ,  H01L31/02 ,  H01L31/0203

CPC classification number: H01L24/73 ,  H01L23/12 ,  H01L23/15 ,  H01L23/49811 ,  H01L23/49827 ,  H01L24/03 ,  H01L24/05 ,  H01L24/13 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/83 ,  H01L31/02002 ,  H01L31/0203 ,  H01L31/02161 ,  H01L31/022408 ,  H01L31/103 ,  H01L2224/0347 ,  H01L2224/04026 ,  H01L2224/05082 ,  H01L2224/05166 ,  H01L2224/05169 ,  H01L2224/05171 ,  H01L2224/05644 ,  H01L2224/05669 ,  H01L2224/13111 ,  H01L2224/13144 ,  H01L2224/26145 ,  H01L2224/26175 ,  H01L2224/2747 ,  H01L2224/28105 ,  H01L2224/29011 ,  H01L2224/29013 ,  H01L2224/29018 ,  H01L2224/29083 ,  H01L2224/291 ,  H01L2224/29144 ,  H01L2224/29166 ,  H01L2224/29169 ,  H01L2224/29171 ,  H01L2224/32225 ,  H01L2224/73103 ,  H01L2224/83191 ,  H01L2224/83192 ,  H01L2224/83365 ,  H01L2224/83385 ,  H01L2224/83444 ,  H01L2224/83469 ,  H01L2224/83815 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/12043 ,  H01L2924/0105 ,  H01L2924/00014

Abstract: An electronic component includes a base, a laminate of a plurality of conductive metal material layers, and a solder layer made of Au—Sn alloy solder. The laminate is disposed on the base. The solder layer is disposed on the laminate. The laminate includes a surface layer made of Au as the conductive metal material layer constituting an outermost layer. The surface layer includes a solder layer-disposing region in which the solder layer is disposed and a solder layer-empty region in which the solder layer is not disposed. The solder layer-disposing region and the solder layer-empty region are spatially separated from each other.

公开(公告)号：US20150214395A1

公开(公告)日：2015-07-30

申请号：US14683524

申请日：2015-04-10

Applicant: HAMAMATSU PHOTONICS K.K.

Inventor： Kazuhisa YAMAMURA ,  Akira SAKAMOTO ,  Terumasa NAGANO ,  Yoshitaka ISHIKAWA ,  Satoshi KAWAI

IPC: H01L31/0236 ,  H01L27/146 ,  H01L31/107

CPC classification number: H01L31/02366 ,  H01L27/1446 ,  H01L27/1464 ,  H01L31/0236 ,  H01L31/02363 ,  H01L31/028 ,  H01L31/107 ,  H01L31/1804 ,  Y02E10/547

Abstract: A p− type semiconductor substrate 20 has a first principal surface 20a and a second principal surface 20b opposed to each other and includes a photosensitive region 21. The photosensitive region 21 is composed of an n+ type impurity region 23, a p+ type impurity region 25, and a region to be depleted with application of a bias voltage in the p− type semiconductor substrate 20. An irregular asperity 10 is formed in the second principal surface 20b of the p− type semiconductor substrate 20. An accumulation layer 37 is formed on the second principal surface 20b side of the p− type semiconductor substrate 20 and a region in the accumulation layer 37 opposed to the photosensitive region 21 is optically exposed.

Abstract translation: p型半导体衬底20具有彼此相对并包括感光区域21的第一主表面20a和第二主表面20b。感光区域21由n +型杂质区域23，p +型杂质区域25 以及在p型半导体衬底20中施加偏置电压而被耗尽的区域。在p型半导体衬底20的第二主表面20b中形成不规则的凹凸10.在 p型半导体衬底20的第二主表面20b侧和与感光区域21相对的累积层37中的区域被光学曝光。

公开(公告)号：US20150171127A1

公开(公告)日：2015-06-18

申请号：US14627238

申请日：2015-02-20

Applicant: HAMAMATSU PHOTONICS K.K.

Inventor： Hiroshi OGURI ,  Yoshitaka ISHIKAWA ,  Akira SAKAMOTO ,  Tomoya TAGUCHI ,  Yoshimaro FUJII

IPC: H01L27/146 ,  H01L27/144

CPC classification number: H01L27/14632 ,  H01L27/1446 ,  H01L27/14603 ,  H01L27/1463 ,  H01L31/022408 ,  H01L31/02327 ,  H01L31/0352 ,  H01L31/03529 ,  H01L31/103 ,  H01L31/18 ,  Y02E10/50

Abstract: A manufacturing method for an edge illuminated type photodiode has: a process of forming an impurity-doped layer of a first conductivity type in each of device forming regions in a semiconductor substrate; a process of forming an impurity-doped layer of a second conductivity type in each of the device forming regions; a process of forming a trench extending in a direction of thickness of the semiconductor substrate from a principal surface, at a position of a boundary between adjacent device forming regions, by etching to expose side faces of the device forming regions; a process of forming an insulating film on the exposed side faces of the device forming regions; a process of forming an electrode for each corresponding impurity-doped layer on the principal surface side of the semiconductor substrate; and a process of implementing singulation of the semiconductor substrate into the individual device forming regions

Abstract translation: 边缘照明型光电二极管的制造方法具有：在半导体衬底中的器件形成区域的每一个中形成第一导电类型的杂质掺杂层的工序; 在每个器件形成区域中形成第二导电类型的杂质掺杂层的工艺; 在相邻的器件形成区域的边界的位置处，通过蚀刻从主表面形成在半导体衬底的厚度方向上延伸的沟槽的工艺，以暴露器件形成区域的侧面; 在器件形成区域的露出侧面上形成绝缘膜的工序; 在半导体衬底的主表面侧上形成用于每个对应的杂质掺杂层的电极的工艺; 以及将半导体衬底分离成单个器件形成区域的过程

公开(公告)号：US20140061835A1

公开(公告)日：2014-03-06

申请号：US14073249

申请日：2013-11-06

Applicant: Hamamatsu Photonics K.K.

Inventor： Akira SAKAMOTO ,  Takashi IIDA ,  Koei YAMAMOTO ,  Kazuhisa YAMAMURA ,  Terumasa NAGANO

IPC: H01L31/0236

CPC classification number: H01L31/02366 ,  H01L27/1446 ,  H01L31/0236 ,  H01L31/02363 ,  H01L31/035281 ,  H01L31/1804 ,  Y02E10/547 ,  Y02P70/521

Abstract: Prepared is an n− type semiconductor substrate 1 having a first principal surface 1a and a second principal surface 1b opposed to each other, and having a p+ type semiconductor region 3 formed on the first principal surface 1a side. At least a region opposed to the p+ type semiconductor region 3 in the second principal surface 1b of the n− type semiconductor substrate 1 is irradiated with a pulsed laser beam to form an irregular asperity 10. After formation of the irregular asperity 10, an accumulation layer 11 with an impurity concentration higher than that of the n− type semiconductor substrate 1 is formed on the second principal surface 1b side of the n− type semiconductor substrate 1. After formation of the accumulation layer 11, the n− type semiconductor substrate 1 is subjected to a thermal treatment.

Abstract translation: 制备的n型半导体衬底1具有彼此相对的第一主表面1a和第二主表面1b，并且具有形成在第一主表面1a侧上的p +型半导体区域3。 在n型半导体衬底1的第二主表面1b中至少与p +型半导体区域3相对的区域用脉冲激光束照射以形成不规则凹凸。在形成不规则凹凸10之后，积累 在n型半导体衬底1的第二主表面1b侧上形成杂质浓度高于n型半导体衬底1的层11。在形成蓄积层11之后，n型半导体衬底1 进行热处理。

公开(公告)号：US20200035747A1

公开(公告)日：2020-01-30

申请号：US16491193

申请日：2018-03-01

Applicant: HAMAMATSU PHOTONICS K.K.

Inventor： Kazuto OFUJI ,  Masashi ITO ,  Katsumi SHIBAYAMA ,  Akira SAKAMOTO

IPC: H01L27/148

Abstract: Provided a semiconductor light detection element including: a semiconductor portion having a front surface including a light reception region that receives incident light and photoelectrically converting the incident light incident on the light reception region; a metal portion provided on the front surface; and a carbon nanotube film provided on the light reception region and formed by depositing a plurality of carbon nanotubes. The carbon nanotube film extends over an upper surface of the metal portion from an upper surface of the light reception region.

公开(公告)号：US20170162726A1

公开(公告)日：2017-06-08

申请号：US15434373

申请日：2017-02-16

Applicant: HAMAMATSU PHOTONICS K.K.

Inventor： Kazuhisa YAMAMURA ,  Akira SAKAMOTO ,  Terumasa NAGANO ,  Yoshitaka ISHIKAWA ,  Satoshi KAWAI

IPC: H01L31/0236 ,  H01L31/18 ,  H01L31/107 ,  H01L27/144 ,  H01L31/028

CPC classification number: H01L31/02366 ,  H01L27/1446 ,  H01L27/1464 ,  H01L31/0236 ,  H01L31/02363 ,  H01L31/028 ,  H01L31/107 ,  H01L31/1804 ,  Y02E10/547

Abstract: A p− type semiconductor substrate 20 has a first principal surface 20a and a second principal surface 20b opposed to each other and includes a photosensitive region 21. The photosensitive region 21 is composed of an n+ type impurity region 23, a p+ type impurity region 25, and a region to be depleted with application of a bias voltage in the p− type semiconductor substrate 20. An irregular asperity 10 is formed in the second principal surface 20b of the p− type semiconductor substrate 20. An accumulation layer 37 is formed on the second principal surface 20b side of the p− type semiconductor substrate 20 and a region in the accumulation layer 37 opposed to the photosensitive region 21 is optically exposed.

公开(公告)号：US20140061840A1

公开(公告)日：2014-03-06

申请号：US14012273

申请日：2013-08-28

Applicant: HAMAMATSU PHOTONICS K.K.

Inventor： Hiroshi OGURI ,  Yoshitaka ISHIKAWA ,  Akira SAKAMOTO ,  Tomoya TAGUCHI ,  Yoshimaro FUJII

IPC: H01L31/0232

CPC classification number: H01L27/14632 ,  H01L27/1446 ,  H01L27/14603 ,  H01L27/1463 ,  H01L31/022408 ,  H01L31/02327 ,  H01L31/0352 ,  H01L31/03529 ,  H01L31/103 ,  H01L31/18 ,  Y02E10/50

Abstract: A manufacturing method for an edge illuminated type photodiode has: a process of forming an impurity-doped layer of a first conductivity type in each of device forming regions in a semiconductor substrate; a process of forming an impurity-doped layer of a second conductivity type in each of the device forming regions; a process of forming a trench extending in a direction of thickness of the semiconductor substrate from a principal surface, at a position of a boundary between adjacent device forming regions, by etching to expose side faces of the device forming regions; a process of forming an insulating film on the exposed side faces of the device forming regions; a process of forming an electrode for each corresponding impurity-doped layer on the principal surface side of the semiconductor substrate; and a process of implementing singulation of the semiconductor substrate into the individual device forming regions

Abstract translation: 边缘照明型光电二极管的制造方法具有：在半导体衬底中的器件形成区域的每一个中形成第一导电类型的杂质掺杂层的工序; 在每个器件形成区域中形成第二导电类型的杂质掺杂层的工艺; 在相邻的器件形成区域的边界的位置处，通过蚀刻从主表面形成在半导体衬底的厚度方向上延伸的沟槽的工艺，以暴露器件形成区域的侧面; 在器件形成区域的露出侧面上形成绝缘膜的工序; 在半导体衬底的主表面侧上形成用于每个对应的杂质掺杂层的电极的工艺; 以及将半导体衬底分离成单个器件形成区域的过程