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    SEMICONDUCTOR LIGHT-DETECTING ELEMENT
    3.
    发明申请
    SEMICONDUCTOR LIGHT-DETECTING ELEMENT 审中-公开
    半导体光检测元件

    公开(公告)号：US20140061835A1

    公开(公告)日：2014-03-06

    申请号：US14073249

    申请日：2013-11-06

    Applicant: Hamamatsu Photonics K.K.

    Inventor： Akira SAKAMOTO ,  Takashi IIDA ,  Koei YAMAMOTO ,  Kazuhisa YAMAMURA ,  Terumasa NAGANO

    IPC: H01L31/0236

    CPC classification number: H01L31/02366 ,  H01L27/1446 ,  H01L31/0236 ,  H01L31/02363 ,  H01L31/035281 ,  H01L31/1804 ,  Y02E10/547 ,  Y02P70/521

    Abstract: Prepared is an n− type semiconductor substrate 1 having a first principal surface 1a and a second principal surface 1b opposed to each other, and having a p+ type semiconductor region 3 formed on the first principal surface 1a side. At least a region opposed to the p+ type semiconductor region 3 in the second principal surface 1b of the n− type semiconductor substrate 1 is irradiated with a pulsed laser beam to form an irregular asperity 10. After formation of the irregular asperity 10, an accumulation layer 11 with an impurity concentration higher than that of the n− type semiconductor substrate 1 is formed on the second principal surface 1b side of the n− type semiconductor substrate 1. After formation of the accumulation layer 11, the n− type semiconductor substrate 1 is subjected to a thermal treatment.

    Abstract translation: 制备的n型半导体衬底1具有彼此相对的第一主表面1a和第二主表面1b，并且具有形成在第一主表面1a侧上的p +型半导体区域3。 在n型半导体衬底1的第二主表面1b中至少与p +型半导体区域3相对的区域用脉冲激光束照射以形成不规则凹凸。在形成不规则凹凸10之后，积累 在n型半导体衬底1的第二主表面1b侧上形成杂质浓度高于n型半导体衬底1的层11。在形成蓄积层11之后，n型半导体衬底1 进行热处理。

    PHOTODIODE ARRAY
    4.
    发明申请
    PHOTODIODE ARRAY 审中-公开

    公开(公告)号：US20180331134A1

    公开(公告)日：2018-11-15

    申请号：US16040709

    申请日：2018-07-20

    Applicant: HAMAMATSU PHOTONICS K.K.

    Inventor： Kazuhisa YAMAMURA ,  Kenichi SATO

    IPC: H01L27/144 ,  H01L27/146 ,  H01L31/107 ,  H01L27/14

    CPC classification number: H01L27/1446 ,  H01L27/14 ,  H01L27/14603 ,  H01L27/14605 ,  H01L27/14636 ,  H01L31/107

    Abstract: A photodiode array 1 has a plurality of photodetector channels 10 which are farmed on an n-type substrate 2 having an n-type semiconductor layer 12, with a light to be detected being incident to the plurality of photodetector channels 10. The photodiode array 1 comprises: a p−-type semiconductor layer 13 formed on the n-type semiconductor layer 12 of the substrate 2; resistors 4 each of which is provided to each of the photodetector channels 10 and is connected to a signal conductor 3 at one end thereof; and an n-type separating part 20 formed between the plurality of photodetector channels 10. The p−-type semiconductor layer 13 fauns a pn junction at the interface between the substrate 2, and comprises a plurality of multiplication regions AM for avalanche multiplication of carriers produced by the incidence of the light to be detected so that each of the multiplication regions corresponds to each of the photodetector channels. The separating part 20 is formed so that each of the multiplication regions AM of the p−-type semiconductor layer 13 corresponds to each of the photodetector channels 10.

    PHOTODIODE AND PHOTODIODE ARRAY
    6.
    发明申请
    PHOTODIODE AND PHOTODIODE ARRAY 审中-公开
    光电和光电子阵列

    公开(公告)号：US20140110808A1

    公开(公告)日：2014-04-24

    申请号：US14138950

    申请日：2013-12-23

    Applicant: HAMAMATSU PHOTONICS K.K.

    Inventor： Kazuhisa YAMAMURA ,  Akira SAKAMOTO ,  Terumasa NAGANO ,  Yoshitaka ISHIKAWA ,  Satoshi KAWAI

    IPC: H01L27/146

    CPC classification number: H01L27/1464 ,  H01L27/1462 ,  H01L27/14625 ,  H01L27/1463 ,  H01L27/14649 ,  H01L27/14689 ,  H01L31/0232 ,  H01L31/0236 ,  H01L31/02363 ,  H01L31/035281 ,  H01L31/103 ,  H01L31/107 ,  H01L2224/48091 ,  Y02E10/50 ,  H01L2924/00014

    Abstract: A photodiode array PDA1 is provided with a substrate S wherein a plurality of photodetecting channels CH have an n-type semiconductor layer 32. The photodiode array PDA1 is provided with a p− type semiconductor layer 33 formed on the n-type semiconductor layer 32, resistors 24 provided for the respective photodetecting channels CH and each having one end portion connected to a signal conducting wire 23, and an n-type separating portion 40 formed between the plurality of photodetecting channels CH. The p− type semiconductor layer 33 forms pn junctions at an interface to the n-type semiconductor layer 32 and has a plurality of multiplication regions AM for avalanche multiplication of carriers generated with incidence of detection target light, corresponding to the respective photodetecting channels. An irregular asperity 10 is formed in a surface of the n-type semiconductor layer 32 and the surface is optically exposed.

    Abstract translation: 光电二极管阵列PDA1设置有基板S，其中多个受光通道CH具有n型半导体层32.光电二极管阵列PDA1设置有形成在n型半导体层32上的p型半导体层33，电阻 设置在相应的光检测通道CH上，每个具有连接到信号导线23的一个端部，以及形成在多个光电检测通道CH之间的n型分离部分40。 p型半导体层33在与n型半导体层32的界面处形成pn结，并且具有多个乘法区域AM，用于对应于各个受光通道而与检测目标光入射产生的载流子的雪崩乘法。 在n型半导体层32的表面上形成不规则的凹凸10，并且该表面被光学曝光。

    PHOTODIODE AND PHOTODIODE ARRAY
    9.
    发明申请
    PHOTODIODE AND PHOTODIODE ARRAY 有权
    光电和光电子阵列

    公开(公告)号：US20150214395A1

    公开(公告)日：2015-07-30

    申请号：US14683524

    申请日：2015-04-10

    Applicant: HAMAMATSU PHOTONICS K.K.

    Inventor： Kazuhisa YAMAMURA ,  Akira SAKAMOTO ,  Terumasa NAGANO ,  Yoshitaka ISHIKAWA ,  Satoshi KAWAI

    IPC: H01L31/0236 ,  H01L27/146 ,  H01L31/107

    CPC classification number: H01L31/02366 ,  H01L27/1446 ,  H01L27/1464 ,  H01L31/0236 ,  H01L31/02363 ,  H01L31/028 ,  H01L31/107 ,  H01L31/1804 ,  Y02E10/547

    Abstract: A p− type semiconductor substrate 20 has a first principal surface 20a and a second principal surface 20b opposed to each other and includes a photosensitive region 21. The photosensitive region 21 is composed of an n+ type impurity region 23, a p+ type impurity region 25, and a region to be depleted with application of a bias voltage in the p− type semiconductor substrate 20. An irregular asperity 10 is formed in the second principal surface 20b of the p− type semiconductor substrate 20. An accumulation layer 37 is formed on the second principal surface 20b side of the p− type semiconductor substrate 20 and a region in the accumulation layer 37 opposed to the photosensitive region 21 is optically exposed.

    Abstract translation: p型半导体衬底20具有彼此相对并包括感光区域21的第一主表面20a和第二主表面20b。感光区域21由n +型杂质区域23，p +型杂质区域25 以及在p型半导体衬底20中施加偏置电压而被耗尽的区域。在p型半导体衬底20的第二主表面20b中形成不规则的凹凸10.在 p型半导体衬底20的第二主表面20b侧和与感光区域21相对的累积层37中的区域被光学曝光。

    PHOTODIODE ARRAY
    10.
    发明申请
    PHOTODIODE ARRAY 有权
    光斑阵列

    公开(公告)号：US20140117484A1

    公开(公告)日：2014-05-01

    申请号：US13710845

    申请日：2012-12-11

    Applicant: HAMAMATSU PHOTONICS K.K.

    Inventor： Koei YAMAMOTO ,  Terumasa NAGANO ,  Kazuhisa YAMAMURA ,  Kenichi SATO ,  Ryutaro TSUCHIYA

    IPC: H01L27/144

    CPC classification number: H01L27/1446 ,  H01L31/107

    Abstract: Each light detecting unit includes a semiconductor region that outputs a carrier, and a surface electrode. In a photodiode array, a read wire is positioned between neighboring avalanche photodiodes. When a plane including a surface of the semiconductor region is set as a reference plane, a distance tb from the reference plane to the read wire is larger than a distance to from the reference plane to the surface electrode.

    Abstract translation: 每个光检测单元包括输出载体的半导体区域和表面电极。 在光电二极管阵列中，读线被定位在相邻的雪崩光电二极管之间。 当将包括半导体区域的表面的平面设定为基准面时，从基准面到读取线的距离tb大于从基准面到表面电极的距离。

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