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公开(公告)号：US20150173186A1
公开(公告)日：2015-06-18
申请号：US14280205
申请日：2014-05-16
Inventor： Bock Soon NA , Soon-Won JUNG , Jae Bon KOO , Chan Woo PARK , Sang Chul LIM , Sang Seok LEE , Kyoung Ik CHO , Hye Yong CHU
CPC classification number: H05K1/0283 , H05K2201/017 , H05K2201/10106 , H05K2201/10128 , H05K2201/10151 , Y10T29/49156 , Y10T29/49158 , Y10T29/49162
Abstract: Provided is a stretchable devices. The stretchable device includes a first stretchable substrate having a first wavy surface that wrinkles in a first direction; first wiring lines extending along the first wavy surface in the first direction; a second stretchable substrate having a second wavy surface that faces the first wavy surface and wrinkles in a second direction intersecting the first direction, wherein the second stretchable substrate is disposed on the first stretchable substrate; second wiring lines extending along the second wavy surface in the second direction; and interlayer insulating layers disposed on the intersections of the first wiring lines and the second wiring lines and disposed between the first wiring lines and the second wiring lines.
Abstract translation: 提供了一种可拉伸的装置。 该可拉伸装置包括：具有在第一方向上折皱的第一波状表面的第一可拉伸基底; 第一布线沿着第一方向沿第一波浪形表面延伸; 第二可拉伸基板，具有面向第一波状面的第二波状表面，并且沿与第一方向交叉的第二方向起皱纹，其中第二可拉伸基板设置在第一可拉伸基板上; 第二布线沿第二波形表面沿第二方向延伸; 以及层间绝缘层，其设置在第一布线和第二布线的交点上，并布置在第一布线和第二布线之间。
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公开(公告)号：US20140218872A1
公开(公告)日：2014-08-07
申请号：US14089378
申请日：2013-11-25
Inventor： Chan Woo PARK , Jae Bon KOO , Soon-Won JUNG , Bock Soon NA , Sang Chul LIM , Ji-Young OH , Hye Yong CHU
CPC classification number: H05K1/0283 , H05K1/0287 , H05K1/185 , H05K2201/10151
Abstract: Provided is an electronic circuit. The electronic circuit includes: a substrate including a device region and a wiring region; an electronic device disposed on the device region; and a conductive wire disposed on the wiring region and connected to the electronic device, wherein the substrate has a first side where the electronic device and the conductive wire contact and a second side facing the first side; the first side and the second side of the wiring region have a convex structure; the first side of the device region is flat; and the device region is thicker than the wiring region.
Abstract translation: 提供电子电路。 电子电路包括：包括器件区域和布线区域的衬底; 设置在所述设备区域上的电子设备; 以及设置在所述布线区域上并连接到所述电子设备的导线，其中所述基板具有所述电子设备和所述导电线接触的第一侧和面向所述第一侧的第二侧; 布线区域的第一面和第二面具有凸形结构; 设备区域的第一侧是平坦的; 并且器件区域比布线区域厚。
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3.发明申请METHOD OF MANUFACTURING FLEXIBLE SUBSTRATE ALLOWING ELECTRONIC DEVICE TO BE MOUNTED THERETO 审中-公开制造易于安装的电子器件的柔性基板的制造方法公开(公告)号：US20150159266A1
公开(公告)日：2015-06-11
申请号：US14282980
申请日：2014-05-20
Inventor： Sang Chul LIM , Jae Bon KOO , Chan Woo PARK , Soon-Won JUNG , Bock Soon NA , Sang Seok LEE , Kyoung Ik CHO , Hye Yong CHU
CPC classification number: C23C16/042 , C23C14/20 , C23C14/22 , C23C16/06 , C23C16/44
Abstract: Provided is a method of manufacturing a flexible substrate allowing an electronic device to be mounted thereto. The method of manufacturing a flexible substrate allowing an electronic device to be mountable thereto, includes preparing a substrate, applying a force to the substrate to stretch the substrate in horizontal direction, performing a surface treatment process on the substrate and forming a first region having a plurality of wavy surfaces, and forming an electrode on the first region.
Abstract translation: 提供一种制造允许电子装置安装在其上的柔性基板的方法。 制造允许电子装置可以安装的柔性基板的方法包括：准备基板，向基板施加力以在水平方向上拉伸基板，在基板上进行表面处理处理，并形成具有 多个波状表面，并且在第一区域上形成电极。
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4.发明申请OXIDE TRANSISTOR WITH NANO-LAYERED STRUCTURE AND METHOD OF FABRICATING THE SAME 有权具有纳米结构的氧化物晶体及其制造方法公开(公告)号：US20140159036A1
公开(公告)日：2014-06-12
申请号：US14020498
申请日：2013-09-06
Inventor： Su Jae LEE , Chi-Sun HWANG , Hye Yong CHU , Sang Chul LIM , Jae-Eun PI , Min Ki RYU
IPC: H01L29/786 , H01L29/66
CPC classification number: H01L29/7869 , H01L21/02554 , H01L21/02565 , H01L21/02631 , H01L29/66969 , H01L29/78696
Abstract: According to example embodiments of the inventive concept, provided is a transistor with a nano-layered oxide semiconductor layer. The oxide semiconductor layer may include at least one first nano layer and at least one second nano layer that are alternatingly stacked one on another. Here, the first nano layer and the second nano layer may include different materials from each other, and thus, a channel with high electron mobility may be formed at the interface between the first and second nano layers. Accordingly, the transistor can have high reliability.
Abstract translation: 根据本发明构思的示例性实施例，提供了具有纳米层氧化物半导体层的晶体管。 氧化物半导体层可以包括交替堆叠在一起的至少一个第一纳米层和至少一个第二纳米层。 这里，第一纳米层和第二纳米层可以包括彼此不同的材料，因此，可以在第一和第二纳米层之间的界面处形成具有高电子迁移率的沟道。 因此，晶体管可以具有高的可靠性。
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公开(公告)号：US20140134840A1
公开(公告)日：2014-05-15
申请号：US13846437
申请日：2013-03-18
Inventor： Jae Bon KOO , Chan Woo PARK , Soon-Won JUNG , Sang Chul LIM , Ji-Young OH , Bock Soon NA , Hye Yong CHU
IPC: H01L21/768
CPC classification number: H01L29/78603 , H01L27/1218 , H01L27/1262
Abstract: Provided is a method for manufacturing a stretchable thin film transistor. The method for manufacturing a stretchable thin film transistor includes forming a mold substrate, forming a stretchable insulator on the mold substrate, forming a flat substrate on the stretchable insulator, removing the mold substrate, forming discontinuous and corrugated wires on the stretchable insulator, forming a thin film transistor connected between the wires, and removing the flat substrate.
Abstract translation: 提供一种制造可拉伸薄膜晶体管的方法。 制造可伸缩薄膜晶体管的方法包括：在模具基板上形成模具基板，形成可拉伸绝缘体，在可伸缩绝缘体上形成平坦的基板，去除模具基板，在可拉伸的绝缘体上形成不连续的和波纹的导线， 连接在电线之间的薄膜晶体管，以及去除平坦的基板。
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Patent Agency Ranking
公开(公告)号：US20170186876A1
公开(公告)日：2017-06-29
申请号：US15461567
申请日：2017-03-17
Inventor： Kyoung Ik CHO , Jae Bon KOO , Chan Woo PARK , Bock Soon NA , Sang Seok LEE , Sang Chul LIM , Soon-Won JUNG , Hye Yong CHU
IPC: H01L29/786 , H01L21/311 , H01L29/66
CPC classification number: H01L29/78603 , H01L21/3105 , H01L21/31058 , H01L21/31144 , H01L27/1218 , H01L27/1266 , H01L29/66742
Abstract: Provided is a method for fabricating an electronic device, the method including: preparing a carrier substrate including an element region and a wiring region; forming a sacrificial layer on the carrier substrate; forming an electronic element on the sacrificial layer of the element region; forming a first elastic layer having a corrugated surface on the first elastic layer of the wiring region; forming a metal wirings electrically connecting the electronic element thereto, on the first elastic layer of the wiring region; forming a second elastic layer covering the metal wirings, on the first elastic layer; forming a high rigidity pattern filling in a recess of the second elastic layer above the electronic element so as to overlap the electronic element, and having a corrugated surface; forming a third elastic layer on the second elastic layer and the high rigidity pattern; and separating the carrier substrate.
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7.发明申请公开(公告)号：US20150048375A1
公开(公告)日：2015-02-19
申请号：US14243768
申请日：2014-04-02
Inventor： Ji-Young OH , Jae Bon KOO , Sang Chul LIM , Chan Woo PARK , Soon-Won JUNG , Bock Soon NA , Sang Seok LEE , Hye Yong CHU
IPC: H01L29/786 , B29C59/16 , B29C43/02 , B29C59/02
CPC classification number: H01L29/78603 , B29C35/0266 , B29C43/021 , B29C43/18 , B29C43/203 , B29C59/02 , B29C71/04 , B29K2021/00 , B29K2075/00 , B29K2083/00 , H01L27/1218 , H01L27/1225 , H01L27/1262 , H01L29/7869 , Y10T428/19
Abstract: Provided is a method of manufacturing a gradually stretchable substrate. The method includes forming convex regions and concave regions on a top surface of a stretchable substrate by compressing a mold onto the stretchable substrate and forming non-stretchable patterns by filling the concave regions of the stretchable substrate. The stretchable substrate includes a stretchable region defined by the non-stretchable patterns, the non-stretchable patterns have side surfaces in contact with the stretchable region, and the side surfaces of the non-stretchable patterns are formed of protrusions and a non-protrusion between the protrusions repetitively connected to one another.
Abstract translation: 提供一种制造逐渐拉伸基材的方法。 该方法包括通过将模具压缩到可拉伸基底上并在可伸缩基底的凹部填充而形成不可拉伸图案，在可拉伸基底的顶表面上形成凸区域和凹区域。 可拉伸基材包括由不可拉伸图案限定的可拉伸区域，不可拉伸图案具有与可拉伸区域接触的侧表面，并且不可拉伸图案的侧表面由突起和非伸缩图案之间的非突起形成 突起重复地彼此连接。
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公开(公告)号：US20140161976A1
公开(公告)日：2014-06-12
申请号：US13905666
申请日：2013-05-30
Inventor： Ji-Young OH , Sang Chul LIM , Seongdeok AHN , Chan Woo PARK , Jae Bon KOO
IPC: C09D11/00
CPC classification number: C09D11/52
Abstract: Disclosed are methods of forming a core-shell nano particle for a metal ink. The method includes forming a metal oxide nano particle core, and forming a metal shell on a surface of the metal oxide nano particle core to form a core-shell nano particle.
Abstract translation: 公开了形成金属墨水的核 - 壳纳米粒子的方法。 该方法包括形成金属氧化物纳米颗粒芯，并在金属氧化物纳米颗粒芯的表面上形成金属壳以形成核 - 壳纳米颗粒。
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公开(公告)号：US20140084283A1
公开(公告)日：2014-03-27
申请号：US13757699
申请日：2013-02-01
Inventor： Sang Chul LIM , Ji-Young OH , Seongdeok AHN , Kyoung Ik CHO , Sang Seok LEE , Jae Bon KOO
IPC: H01L29/26
CPC classification number: H01L29/263 , H01L29/4908 , H01L29/66969 , H01L29/78606 , H01L29/78618 , H01L29/78693 , H01L29/78696
Abstract: Provided are a thin film transistor and a method for manufacturing the same. The thin film transistor manufacturing method includes forming a gate electrode on a substrate, forming an active layer that is adjacent to the gate electrode and includes an oxide semiconductor, forming an oxygen providing layer on the active layer, forming a gate dielectric between the gate electrode and the active layer, forming source and drain electrodes coupled to the active layer, forming a planarizing layer covering the gate electrode and the gate dielectric, forming a hole exposing the active layer, and performing a heat treatment process onto the planarizing layer in an atmosphere of oxygen.
Abstract translation: 提供一种薄膜晶体管及其制造方法。 薄膜晶体管的制造方法包括在基板上形成栅电极，形成与栅电极相邻的有源层，并具有氧化物半导体，在有源层上形成氧供给层，在栅极电极 有源层，形成耦合到有源层的源电极和漏电极，形成覆盖栅电极和栅电介质的平坦化层，形成暴露有源层的孔，并在气氛中对平坦化层进行热处理工艺 的氧气。
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公开(公告)号：US20150348800A1
公开(公告)日：2015-12-03
申请号：US14610410
申请日：2015-01-30
Inventor： Kyoung Ik CHO , Jae Bon KOO , Chan Woo PARK , Bock Soon NA , Sang Seok LEE , Sang Chul LIM , Soon-Won JUNG , Hye Yong CHU
IPC: H01L21/311 , H01L29/66 , H01L29/786
CPC classification number: H01L29/78603 , H01L21/3105 , H01L21/31058 , H01L21/31144 , H01L27/1218 , H01L27/1266 , H01L29/66742
Abstract: Provided is a method for fabricating an electronic device, the method including: preparing a carrier substrate including an element region and a wiring region; forming a sacrificial layer on the carrier substrate; forming an electronic element on the sacrificial layer of the element region; forming a first elastic layer having a corrugated surface on the first elastic layer of the wiring region; forming a metal wirings electrically connecting the electronic element thereto, on the first elastic layer of the wiring region; forming a second elastic layer covering the metal wirings, on the first elastic layer; forming a high rigidity pattern filling in a recess of the second elastic layer above the electronic element so as to overlap the electronic element, and having a corrugated surface; forming a third elastic layer on the second elastic layer and the high rigidity pattern; and separating the carrier substrate.
Abstract translation: 本发明提供一种电子器件的制造方法，该方法包括：制备包括元件区域和布线区域的载体衬底; 在载体基板上形成牺牲层; 在元件区域的牺牲层上形成电子元件; 在布线区域的第一弹性层上形成具有波纹状表面的第一弹性层; 在布线区域的第一弹性层上形成电连接电子元件的金属配线; 在所述第一弹性层上形成覆盖所述金属布线的第二弹性层; 在所述电子元件上方的所述第二弹性层的凹部中形成高刚性图案，以与所述电子元件重叠，并具有波纹状表面; 在第二弹性层上形成第三弹性层和高刚性图案; 并分离载体衬底。
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