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    MULTI-LAYER CIRCUIT BOARD HAVING CAVITY AND MANUFACTURING METHOD THEREOF
    3.
    发明申请
    MULTI-LAYER CIRCUIT BOARD HAVING CAVITY AND MANUFACTURING METHOD THEREOF 有权
    多层电路板及其制造方法

    公开(公告)号：US20160095231A1

    公开(公告)日：2016-03-31

    申请号：US14603363

    申请日：2015-01-23

    Applicant: Chien-Hung Wu

    Inventor： Chien-Hung Wu

    IPC: H05K3/46

    CPC classification number: H05K3/4697 ,  H05K3/4614 ,  H05K3/462 ,  H05K3/4644 ,  H05K3/465 ,  H05K2203/061 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/4913

    Abstract: A manufacturing method of a multi-layer circuit board having a cavity is provided, including the following steps: a core board is provided, and a through hole is formed penetrating the core board; two build-up structures are bonded to two opposite sides of the core board to foam the multi-layer circuit board, and the two build-up structures cover the through hole; and a portion of one of the two build-up structures corresponding to the through hole is removed to make the through hole communicate with the outside and form the cavity. A multi-layer circuit board having a cavity, manufactured by the aforementioned method, is also provided.

    Abstract translation: 提供一种具有空腔的多层电路板的制造方法，包括以下步骤：设置芯板，并且形成穿透芯板的通孔; 两个堆积结构被结合到芯板的两个相对侧以使多层电路板发泡，并且两个堆积结构覆盖通孔; 并且去除与通孔相对应的两个堆积结构中的一个的一部分，以使通孔与外部连通并形成空腔。 还提供了通过上述方法制造的具有空腔的多层电路板。

    System and method for accessing interleaved data in a memory device
    6.
    发明授权
    System and method for accessing interleaved data in a memory device 有权
    用于访问存储器设备中的交错数据的系统和方法

    公开(公告)号：US07904636B2

    公开(公告)日：2011-03-08

    申请号：US11358673

    申请日：2006-02-21

    Applicant: Chien-Hung Wu

    Inventor： Chien-Hung Wu

    IPC: G06F12/10

    CPC classification number: G06F3/0616 ,  G06F3/064 ,  G06F3/0679 ,  G06F12/0246

    Abstract: A memory and storage device includes a data management system for transferring data units referenced by logical addresses. The data management system maps the logical addresses to sequential virtual addresses according to the order the data units are received. The data management system also maps the sequential virtual addresses to sequential physical addresses in a memory block of a memory device. Additionally, the data management system can modify a data unit in the memory block by copying any other valid data units in the memory block to another memory block and writing the modified data unit into this other memory block. The data management system writes the valid data units and the modified data unit into sequential physical addresses of this other memory block.

    Abstract translation: 存储器和存储设备包括用于传送由逻辑地址引用的数据单元的数据管理系统。 数据管理系统根据接收数据单元的顺序将逻辑地址映射到顺序虚拟地址。 数据管理系统还将顺序虚拟地址映射到存储器件的存储器块中的顺序物理地址。 此外，数据管理系统可以通过将存储器块中的任何其他有效数据单元复制到另一个存储块并将修改的数据单元写入该另一个存储器块来修改存储器块中的数据单元。 数据管理系统将有效的数据单元和修改的数据单元写入该另一个存储块的顺序物理地址。

    Doping of SiC structures and methods associated with same
    8.
    发明申请
    Doping of SiC structures and methods associated with same 有权
    掺杂SiC结构和与之相关的方法

    公开(公告)号：US20070246786A1

    公开(公告)日：2007-10-25

    申请号：US11407853

    申请日：2006-04-19

    Applicant: Jeffrey Melzak ,  Chien-Hung Wu

    Inventor： Jeffrey Melzak ,  Chien-Hung Wu

    IPC: H01L29/82 ,  H01L21/00

    CPC classification number: B81C1/00666 ,  H01L21/3148 ,  H01L29/1608 ,  H01L29/84 ,  Y10S438/931

    Abstract: Doped silicon carbide structures, as well as methods associated with the same, are provided. The structures, for example, are components (e.g., layer, patterned structure) in MEMS structures. The doped silicon carbide structures may be highly conductive, thus, providing low resistance to electrical current. An in-situ doping process may be used to form the structures. The process parameters can be selected so that the structures have a low residual stress and/or low strain gradient. Thus, the structures may be formed having desired dimensions with little (or no) distortion arising from residual stress and/or strain gradient. The high conductivity and mechanical integrity of the structures are significant advantages in MEMS devices such as sensors and actuators.

    Abstract translation: 提供了掺杂的碳化硅结构，以及与其相关的方法。 该结构例如是MEMS结构中的部件（例如，层，图案化结构）。 掺杂的碳化硅结构可以是高导电性的，因此提供低电阻的电流。 可以使用原位掺杂工艺来形成结构。 可以选择工艺参数，使得结构具有低残余应力和/或低应变梯度。 因此，可以形成具有由残余应力和/或应变梯度引起的很少（或不）变形的期望尺寸的结构。 结构的高导电性和机械完整性在诸如传感器和致动器的MEMS装置中是显着的优点。

    Method of efficient data management with flash storage system
    9.
    发明授权
    Method of efficient data management with flash storage system 有权
    使用闪存存储系统的高效数据管理方法

    公开(公告)号：US07194596B2

    公开(公告)日：2007-03-20

    申请号：US10863210

    申请日：2004-06-09

    Applicant: Chien-Hung Wu ,  Jen-Chieh Lou ,  Chien-Hua Chu ,  Jui-Chien Chen

    Inventor： Chien-Hung Wu ,  Jen-Chieh Lou ,  Chien-Hua Chu ,  Jui-Chien Chen

    IPC: G06F12/00

    CPC classification number: G06F12/0246 ,  G06F2212/7203

    Abstract: A data management for a flash memory device is disclosed. The device includes a screen virtual sector table and a virtual unit versus physical unit table (V2P table) for each block. With the auxiliary of the screen virtual sector table and v2p table, the data programming into the target block of the flash memory is in accordance with the data receiving order, which is from lower page number to higher page number in case the target block is free. The data can be written into the target block contains data already through one or two temporal block(s). The conventional LBA data transfer protocol can still be applied to the flash memory device of this invention.

    Abstract translation: 公开了一种用于闪速存储器件的数据管理。 该装置包括用于每个块的屏幕虚拟扇区表和虚拟单元对物理单元表（V2P表）。 通过屏幕虚拟扇区表和v2p表的辅助，闪存中目标块的数据编程符合数据接收顺序，即从目标块空闲的页数到较高页数 。 可以将数据写入包含已经通过一个或两个时间块的数据的目标块。 传统的LBA数据传输协议仍然可以应用于本发明的闪存设备。

    Method of efficient data management with flash storage system
    10.
    发明申请
    Method of efficient data management with flash storage system 有权
    使用闪存存储系统的高效数据管理方法

    公开(公告)号：US20050278479A1

    公开(公告)日：2005-12-15

    申请号：US10863210

    申请日：2004-06-09

    Applicant: Chien-Hung Wu ,  Jen-Chieh Lou ,  Chien-Hua Chu ,  Jui-Chien Chen

    Inventor： Chien-Hung Wu ,  Jen-Chieh Lou ,  Chien-Hua Chu ,  Jui-Chien Chen

    IPC: G06F12/02 ,  G06F12/08

    CPC classification number: G06F12/0246 ,  G06F2212/7203

    Abstract: A data management for a flash memory device is disclosed. The device includes a screen virtual sector table and a virtual unit versus physical unit table (V2P table) for each block. With the auxiliary of the screen virtual sector table and v2p table, the data programming into the target block of the flash memory is in accordance with the data receiving order, which is from lower page number to higher page number in case the target block is free. The data can be written into the target block contains data already through one or two temporal block(s). The conventional LBA data transfer protocol can still be applied to the flash memory device of this invention.

    Abstract translation: 公开了一种用于闪速存储器件的数据管理。 该装置包括用于每个块的屏幕虚拟扇区表和虚拟单元对物理单元表（V2P表）。 通过屏幕虚拟扇区表和v2p表的辅助，闪存中目标块的数据编程符合数据接收顺序，即从目标块空闲的页数到较高页数 。 可以将数据写入包含已经通过一个或两个时间块的数据的目标块。 传统的LBA数据传输协议仍然可以应用于本发明的闪存设备。

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