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公开(公告)号：US11668734B2
公开(公告)日：2023-06-06
申请号：US17446945
申请日：2021-09-03
Inventor： David J. Clarke , Stephen Denis Heffernan , Nijun Wei , Alan J. O'Donnell , Patrick Martin McGuinness , Shaun Bradley , Edward John Coyne , David Aherne , David M. Boland
IPC: G01R19/165 , G01R31/00 , G01R31/28 , H02H9/04 , H01L27/02 , H01L23/60 , H01L23/62 , H01L23/525 , H02H9/00
CPC classification number: G01R19/16504 , G01R31/002 , G01R31/2832 , G01R31/2856 , H01L23/5256 , H01L23/60 , H01L23/62 , H01L27/0288 , H02H9/00 , H02H9/042
Abstract: The disclosed technology generally relates to electrical overstress protection devices, and more particularly to electrical overstress monitoring devices for detecting electrical overstress events in semiconductor devices. In one aspect, an electrical overstress monitor and/or protection device includes a two different conductive structures configured to electrically arc in response to an EOS event and a sensing circuit configured to detect a change in a physical property of the two conductive structures caused by the EOS event. The two conductive structures have facing surfaces that have different shapes.
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公开(公告)号：US11644497B2
公开(公告)日：2023-05-09
申请号：US17456307
申请日：2021-11-23
Inventor： Alan J. O'Donnell , David Aherne , Javier Alejandro Salcedo , David J. Clarke , John A. Cleary , Patrick Martin McGuinness , Albert C. O'Grady
IPC: G01R31/00 , G08B21/18 , H02H1/00 , H02H9/04 , H02H3/20 , H05K1/02 , H02H9/00 , H01L27/02 , H02H3/04
CPC classification number: G01R31/002 , G08B21/185 , H02H1/0007 , H02H9/046 , H01L27/0251 , H02H3/04 , H02H3/20 , H02H9/005 , H02H9/04 , H02H9/042 , H05K1/0259
Abstract: Aspects of this disclosure relate to detecting and recording information associated with electrical overstress (EOS) events, such as electrostatic discharge (ESD) events. For example, in one embodiment, an apparatus includes an electrical overstress protection device, a detection circuit configured to detect an occurrence of the EOS event, and a memory configured to store information indicative of the EOS event.
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公开(公告)号：US11112436B2
公开(公告)日：2021-09-07
申请号：US16360356
申请日：2019-03-21
Inventor： David J. Clarke , Stephen Denis Heffernan , Nijun Wei , Alan J. O'Donnell , Patrick Martin McGuinness , Shaun Bradley , Edward John Coyne , David Aherne , David M. Boland
IPC: G01R19/165 , G01R31/00 , G01R31/28 , H02H9/04 , H01L27/02 , H01L23/60 , H01L23/62 , H01L23/525 , H02H9/00
Abstract: The disclosed technology generally relates to electrical overstress protection devices, and more particularly to electrical overstress monitoring devices for detecting electrical overstress events in semiconductor devices. In one aspect, an electrical overstress monitor and/or protection device includes a two different conductive structures configured to electrically arc in response to an EOS event and a sensing circuit configured to detect a change in a physical property of the two conductive structures caused by the EOS event. The two conductive structures have facing surfaces that have different shapes.
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公开(公告)号：US20240377453A1
公开(公告)日：2024-11-14
申请号：US18666452
申请日：2024-05-16
Inventor： Edward John Coyne , Alan J. O'Donnell , Shaun Bradley , David Aherne , David Boland , Thomas G. O'Dwyer , Colm Patrick Heffernan , Kevin B. Manning , Mark Forde , David J. Clarke , Michael A. Looby
Abstract: The disclosed technology generally relates to integrated circuit devices with wear out monitoring capability. An integrated circuit device includes a wear-out monitor device configured to record an indication of wear-out of a core circuit separated from the wear-out monitor device, wherein the indication is associated with localized diffusion of a diffusant within the wear-out monitor device in response to a wear-out stress that causes the wear-out of the core circuit.
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公开(公告)号：US12140619B2
公开(公告)日：2024-11-12
申请号：US18188363
申请日：2023-03-22
Inventor： Alan J. O′Donnell , David Aherne , Javier Alejandro Salcedo , David J. Clarke , John A. Cleary , Patrick Martin McGuinness , Albert C. O′Grady
IPC: H02J7/00 , G01R31/00 , G08B21/18 , H02H1/00 , H02H9/04 , H01L27/02 , H02H3/04 , H02H3/20 , H02H9/00 , H05K1/02
Abstract: Aspects of this disclosure relate to detecting and recording information associated with electrical overstress (EOS) events, such as electrostatic discharge (ESD) events. For example, in one embodiment, an apparatus includes an electrical overstress protection device, a detection circuit configured to detect an occurrence of the EOS event, and a memory configured to store information indicative of the EOS event.
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Patent Agency Ranking
6.发明申请公开(公告)号：US20240405518A1
公开(公告)日：2024-12-05
申请号：US18679352
申请日：2024-05-30
Inventor： David J. Clarke , Alan J. O'Donnell , Shaun Bradley , Stephen Denis Heffernan , Patrick Martin McGuinness , Padraig L. Fitzgerald , Edward John Coyne , Michael P. Lynch , John Anthony Cleary , John Ross Wallrabenstein , Paul Joseph Maher , Andrew Christopher Linehan , Gavin Patrick Cosgrave , Michael James Twohig , Jan Kubik , Jochen Schmitt , David Aherne , Mary McSherry , Anne M. McMahon , Stanislav Jolondcovschi , Cillian Burke
IPC: H01T4/10
Abstract: Apparatuses including spark gap structures for electrical overstress (EOS) monitoring or protection, and associated methods, are disclosed. In an aspect, a spark gap device includes first and second conductive layers formed over a substrate, where the first and second conductive layers are electrically connected to first and second voltage nodes, respectively. The first conductive layer includes a plurality of arcing tips configured to form arcing electrode pairs with the second conductive layer to form an arc discharge in response to an EOS voltage between the first and second voltage nodes. The spark gap device further includes a series ballast resistor electrically connected between the arcing tips and the first voltage node, where the ballast resistor in formed in a metallization layer over the substrate and a resistance of the series ballast resistor is substantially higher than a resistance of the second conductive layer.
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公开(公告)号：US12055569B2
公开(公告)日：2024-08-06
申请号：US18317806
申请日：2023-05-15
Inventor： David J. Clarke , Stephen Denis Heffernan , Nijun Wei , Alan J. O'Donnell , Patrick Martin McGuinness , Shaun Bradley , Edward John Coyne , David Aherne , David M. Boland
IPC: G01R19/165 , G01R31/00 , G01R31/28 , H01L23/525 , H01L23/60 , H01L23/62 , H01L27/02 , H02H9/00 , H02H9/04
CPC classification number: G01R19/16504 , G01R31/002 , G01R31/2832 , G01R31/2856 , H01L23/5256 , H01L23/60 , H01L23/62 , H01L27/0288 , H02H9/00 , H02H9/042
Abstract: The disclosed technology generally relates to electrical overstress protection devices, and more particularly to electrical overstress monitoring devices for detecting electrical overstress events in semiconductor devices. In one aspect, an electrical overstress monitor and/or protection device includes a two different conductive structures configured to electrically arc in response to an EOS event and a sensing circuit configured to detect a change in a physical property of the two conductive structures caused by the EOS event. The two conductive structures have facing surfaces that have different shapes.
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公开(公告)号：US11988708B2
公开(公告)日：2024-05-21
申请号：US18318506
申请日：2023-05-16
Inventor： Edward John Coyne , Alan J. O'Donnell , Shaun Bradley , David Aherne , David Boland , Thomas G. O'Dwyer , Colm Patrick Heffernan , Kevin B. Manning , Mark Forde , David J. Clarke , Michael A. Looby
CPC classification number: G01R31/2879 , G01N27/041 , G01R31/2874
Abstract: The disclosed technology generally relates to integrated circuit devices with wear out monitoring capability. An integrated circuit device includes a wear-out monitor device configured to record an indication of wear-out of a core circuit separated from the wear-out monitor device, wherein the indication is associated with localized diffusion of a diffusant within the wear-out monitor device in response to a wear-out stress that causes the wear-out of the core circuit.
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公开(公告)号：US20240159804A1
公开(公告)日：2024-05-16
申请号：US18419415
申请日：2024-01-22
Inventor： David J. Clarke , Stephen Denis Heffernan , Nijun Wei , Alan J. O'Donnell , Patrick Martin McGuinness , Shaun Bradley , Edward John Coyne , David Aherne , David M. Boland
IPC: G01R19/165 , G01R31/00 , G01R31/28 , H01L23/525 , H01L23/60 , H01L23/62 , H01L27/02 , H02H9/00 , H02H9/04
CPC classification number: G01R19/16504 , G01R31/002 , G01R31/2832 , G01R31/2856 , H01L23/5256 , H01L23/60 , H01L23/62 , H01L27/0288 , H02H9/00 , H02H9/042
Abstract: The disclosed technology generally relates to electrical overstress protection devices, and more particularly to electrical overstress monitoring devices for detecting electrical overstress events in semiconductor devices. In one aspect, an electrical overstress monitor and/or protection device includes a two different conductive structures configured to electrically are in response to an EOS event and a sensing circuit configured to detect a change in a physical property of the two conductive structures caused by the EOS event. The two conductive structures have facing surfaces that have different shapes;
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公开(公告)号：US20220252664A1
公开(公告)日：2022-08-11
申请号：US17652857
申请日：2022-02-28
Inventor： Edward John Coyne , Alan J. O'Donnell , Shaun Bradley , David Aherne , David Boland , Thomas G. O'Dwyer , Colm Patrick Heffernan , Kevin B. Manning , Mark Forde , David J. Clarke , Michael A. Looby
Abstract: The disclosed technology generally relates to integrated circuit devices with wear out monitoring capability. An integrated circuit device includes a wear-out monitor device configured to record an indication of wear-out of a core circuit separated from the wear-out monitor device, wherein the indication is associated with localized diffusion of a diffusant within the wear-out monitor device in response to a wear-out stress that causes the wear-out of the core circuit.
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