Invention Publication
- Patent Title: TWO-PASS CORRECTIVE PROGRAMMING FOR MEMORY CELLS THAT STORE MULTIPLE BITS AND POWER LOSS MANAGEMENT FOR TWO-PASS CORRECTIVE PROGRAMMING
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Application No.: US17899409Application Date: 2022-08-30
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Publication No.: US20240071510A1Publication Date: 2024-02-29
- Inventor: Kishore Kumar Muchherla , Huai-Yuan Tseng , Giovanni Maria Paolucci , Dave Scott Ebsen , James Fitzpatrick , Akira Goda , Jeffrey S. McNeil , Umberto Siciliani , Daniel J. Hubbard , Walter Di Francesco , Michele Incarnati
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Main IPC: G11C16/10
- IPC: G11C16/10 ; G11C16/08 ; G11C16/34
Abstract:
Exemplary methods, apparatuses, and systems including a programming manager for controlling writing data bits to a memory device. The programming manager receives a first set of data bits for programming to memory. The programming manager writes a first subset of data bits to a first wordline during a first pass of programming. The programming manager writes a second subset of data bits of the first set of data bits to a buffer. The programming manager receives a second set of data bits for programming. The programming manager writes the second subset of data bits of the first set of data bits to the first wordline during a second pass of programming to increase a bit density of memory cells in the first wordline in response to receiving the second set of data bits.
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