The method for manufacturing a number of electrical nodes, wherein the method includes providing a number of electronic circuits onto a first substrate, such as on a printed circuit board or other electronics substrate, optionally, a low-temperature co-fired ceramic substrate, wherein each one of the electronic circuits includes a circuit pattern and at least one electronics component in connection with the circuit pattern, wherein the electronic circuits are spaced from each other on the first substrate, thereby defining a blank area surrounding each one of the number of electronic circuits, respectively, and providing potting or casting material to embed each one of the number of electronic circuits in the potting or casting material, and, subsequently, hardening, optionally including curing, the potting or casting material to form a filler material layer of the number of electrical nodes.