An integrated circuit structure includes a first and a second semiconductor chip. The first semiconductor chip includes a first substrate and a first plurality of dielectric layers underlying the first substrate. The second semiconductor chip includes a second substrate and a second plurality of dielectric layers over the second substrate, wherein the first and the second plurality of dielectric layers are bonded to each other. A metal pad is in the second plurality of dielectric layers. A redistribution line is over the first substrate. A conductive plug is electrically coupled to the redistribution line. The conductive plug includes a first portion extending from a top surface of the first substrate to a bottom surface of the first substrate, and a second portion extending from the bottom surface of the first substrate to the metal pad. A bottom surface of the second portion contacts a top surface of the metal pad. The invention relates to a stacked integrated circuit with a redistribution line.