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公开(公告)号:US11955959B2
公开(公告)日:2024-04-09
申请号:US17613697
申请日:2019-05-29
发明人: Yasushi Nakayama , Yoshiko Tamada , Takayoshi Miki , Shota Morisaki , Yukio Nakashima , Kenta Uchida , Keisuke Kimura , Tomonobu Mihara
IPC分类号: H03K17/14 , H03K17/04 , H03K17/0412 , H03K17/28 , H02M1/088
CPC分类号: H03K17/14 , H03K17/04 , H03K17/0412 , H03K17/28 , H02M1/088
摘要: A parallel driving device that drives parallel-connected semiconductor elements includes a control unit and a gate driving circuit. The control unit detects a temperature difference between the semiconductor elements on the basis of detected values by temperature sensors that detect temperatures of the individual semiconductor elements. The control unit generates a control signal for changing the timing at which to turn on a first semiconductor element specified from the semiconductor elements on the basis of the temperature difference. The gate driving circuit generates a first driving signal for driving the semiconductor elements, and generates a second driving signal that is the first driving signal delayed on the basis of the control signal, and applies the second driving signal to the first semiconductor element.
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公开(公告)号:US11595004B2
公开(公告)日:2023-02-28
申请号:US17057698
申请日:2019-05-13
发明人: Ting Li , Zhengbo Huang , Yong Zhang , Yabo Ni , Jian'an Wang , Dongbing Fu
摘要: A highly linear time amplifier with power supply rejection. In a reset stage, the threshold value of an over-threshold detector is used for resetting an output node of an amplifier, to eliminate the impact of power supply voltage changes on the threshold value of the threshold detector. A node capacitor unit is charged under the control of an input clock signal. After completion of charging, the node capacitor unit is discharged under the control of a synchronous clock signal. The time amplification gain only depends on the proportion of the charge and discharge current, and the charging and discharging time are completely linear in principle, which eliminates the nonlinearity of the traditional time amplifier, and reduces the negative impact of threshold change on system performance.
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公开(公告)号:US10944395B2
公开(公告)日:2021-03-09
申请号:US16705223
申请日:2019-12-06
发明人: Kunio Matsubara , Hirotoshi Kaneda
IPC分类号: H03K17/082 , H03K17/28 , H03K17/16
摘要: A driving apparatus including: gate driving circuit to drive gates of a first semiconductor element and a second semiconductor element connected in series between a positive side power supply line and a negative side power supply line; a first timing generating circuit to generate a first timing signal when voltage applied to the second semiconductor element becomes reference voltage during a turn-off period of the first semiconductor element; and a first driving condition change circuit, wherein the gate driving circuit relaxes change in a charge amount of the gate of the first semiconductor element, according to the first timing signal.
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公开(公告)号:US10812065B2
公开(公告)日:2020-10-20
申请号:US16270973
申请日:2019-02-08
发明人: Jun Yan
IPC分类号: H03K17/284 , H03K17/22 , H03K17/28 , H02M1/36 , G06F1/26
摘要: There is provided a power supply control apparatus for connection to electrical inputs of an electronic device wherein each electrical input is operatively connected to a power source having a sequencer circuit and a control element, the sequencer circuit including sequencer stage(s). The sequencer circuit selectively receives an indication signal, the sequencer circuit selectively receives a positive indication signal indicative of a voltage supplied to a first of the electrical inputs reaching or passing a predefined voltage threshold, and the sequencer circuit selectively provides a control signal to the control element, the control element triggerable by a positive control signal. Each sequencer stage includes circuit elements, the first selectively receives an input signal and selectively provides an intermediate signal to the second, the second selectively provides an output signal.
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公开(公告)号:US10459510B1
公开(公告)日:2019-10-29
申请号:US16250953
申请日:2019-01-17
发明人: Raghavendra Srinivas , Uday Shankar Mudigonda , Giby Samson , Ramaprasath Vilangudipitchai , Dorav Kumar
IPC分类号: H03K19/00 , H03K17/28 , G06F1/32 , G06F1/3234 , H03K17/693 , H03K17/284
摘要: In certain aspects, an apparatus includes a first plurality of power switch devices. Each of the first plurality of power switch devices includes a delay line having a programmable time delay, and a power switch coupled between a supply rail and a circuit block, wherein the power switch has a control input coupled to the delay line. The apparatus also includes a switch manager configured to program the time delays of the delay lines in the first plurality of power switch devices based on a number of active circuit blocks in a system.
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6.
公开(公告)号:US10438756B2
公开(公告)日:2019-10-08
申请号:US15531290
申请日:2015-11-30
申请人: ABB Schweiz AG
发明人: Anil Talluri
摘要: In aspects, the present invention discloses a method of determining an electrical operating time of a circuit breaker (140) in a multiphase electrical system having a subsystem (160) connectable to a power source (110) through a circuit breaker (140) operated by a controller (130). The controller is connected to a current transformer (120, 150) for measuring current of the subsystem in a one phase. The method comprises monitoring the current of the subsystem in the one phase, determining a first rate of change from the monitored current in the one phase, detecting an instance of switching in an another phase based on the first rate of change, and determining an electrical operating time of the circuit breaker in the another phase based on the detected instance of switching and an instance at which a command for switching in the another phase was provided to the circuit breaker.
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公开(公告)号:US10290329B2
公开(公告)日:2019-05-14
申请号:US15352610
申请日:2016-11-16
发明人: Chi-Yi Shao
IPC分类号: H03H11/26 , G11C5/14 , H03K3/03 , H03K17/28 , H03K19/20 , G11C16/12 , H02M3/07 , G11C16/04 , H02M1/00
摘要: A charge pump apparatus is provided. A two-phase clock signal and a four-phase clock signal for respectively driving a two-phase charge pump circuit and a four-phase charge pump circuit are generated according to delay signals of coupling nodes between delay circuits of a ring oscillator circuit.
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公开(公告)号:US10193546B1
公开(公告)日:2019-01-29
申请号:US15004488
申请日:2016-01-22
发明人: David N. Long
IPC分类号: F04B49/04 , H01H47/22 , H03K17/28 , F04B49/025 , H03K17/567
摘要: A pump switching device is provided. The pump switching device includes a relay, a switch, a sensor and a controller. The relay selectively couples current to a pump motor. The switch is coupled in parallel with the relay. The sensor is configured to generate a signal upon the detection of a condition. The controller is in communication with the sensor. The controller is further coupled to control the relay and the switch. The controller is configured to activate the switch a select amount of time before the controller activates the relay upon initial detection of the signal from the sensor. The controller is further configured to deactivate the switch a select amount of time after the relay is activated while the signal is being detected.
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公开(公告)号:US10056889B2
公开(公告)日:2018-08-21
申请号:US15299361
申请日:2016-10-20
申请人: pSemi Corporation
发明人: Raul Inocencio Alidio , Peter Bacon
CPC分类号: H03K5/133 , H03K5/14 , H03K17/28 , H03K17/284
摘要: Systems, methods, and apparatus for reducing standing wave reflections between delay line modules are described. The delay line modules include semiconductor switches, particularly MOSFET switches fabricated on silicon-on-insulator (“SOI”) and silicon-on-sapphire (“SOS”) substrates and embedded attenuators. According to one aspect, a delay line module includes two switches with delay lines coupled between respective output ports of the switches. Each switch includes MOSFET switches forming conduction paths with selectable high and low impedances. According to another aspect, at least one of the conduction paths includes an attenuator block formed by one or more shunting resistors coupled to one of the MOSFET switches. The output ports of the switches can be selectively coupled to a reference ground via a shunted MOSFET switch.
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10.
公开(公告)号:US09979384B2
公开(公告)日:2018-05-22
申请号:US15122438
申请日:2015-04-02
申请人: DENSO CORPORATION
IPC分类号: H03K19/00 , H03K17/16 , H03K3/012 , H03K5/1534 , H03K17/28
CPC分类号: H03K17/162 , G11C29/023 , G11C29/028 , H03K3/012 , H03K5/1534 , H03K17/163 , H03K17/168 , H03K17/28 , H03K2005/00065 , H03K2005/00247 , H03K2005/00273
摘要: A timing adjustment method for a drive circuit, including: a rise detector for a rise start when a voltage-driven semiconductor element is turned off; a timing signal output unit outputting a speed change timing signal after a set delay time has elapsed from the rise start; and a conduction controller for a conduction control terminal of the semiconductor element using the timing signal, comprises: defining an estimated terminal voltage of the conduction control terminal when a rise completion time elapses; increasing a delay time by a predetermined unit time, and changing the drive signal to a turning off level again, when the conduction control terminal doesn't fall below the estimated terminal voltage after the drive signal is changed to a turning off level before the level is inverted; and determining a delay time, when the conduction control terminal falls below the estimated terminal voltage initially, as a set value.
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