SWITCH CIRCUIT AND ELECTRONIC DEVICE
    1.
    发明公开

    公开(公告)号:US20240313756A1

    公开(公告)日:2024-09-19

    申请号:US18022633

    申请日:2022-09-08

    IPC分类号: H03K17/06 H02J7/00 H03K17/08

    摘要: A switch circuit and an electronic device are provided. The switch circuit includes an external node, an internal node, an enhancement-mode gallium-nitride high-electron-mobility transistor, and a driver module. The enhancement-mode gallium-nitride high-electron-mobility transistor includes a first gate electrode, a first electrode, and a second electrode. The driver module includes a control terminal. The first gate electrode is coupled to the control terminal, the first electrode is coupled to the external node, and the internal node is coupled to the second electrode. The external node receives a charging voltage, and the driver module controls on or off of the enhancement-mode gallium-nitride high-electron-mobility transistor. When the enhancement-mode gallium-nitride high-electron-mobility transistor is turned on, the charging voltage is transmitted to the internal node. Alternatively, the internal node receives a charging voltage, and the driver module controls on or off of the enhancement-mode gallium-nitride high-electron-mobility transistor.

    CIRCUIT ARRANGEMENT, ELECTRICAL SYSTEM, AND METHOD FOR ASCERTAINING BARRIER LAYER TEMPERATURES OF GATE-CONTROLLED SEMICONDUCTOR COMPONENTS

    公开(公告)号:US20240272012A1

    公开(公告)日:2024-08-15

    申请号:US18569327

    申请日:2022-07-01

    申请人: Robert Bosch Gmbh

    摘要: A circuit arrangement, an electrical system, and a method for determining barrier layer temperatures of gate-controlled semiconductor components. First and second semiconductor components of the circuit arrangement are connected in parallel and activated using a gate control circuit which, in an active forward mode of the two semiconductor components, varies a first gate voltage of the first semiconductor component using a first signal, and to varies a second gate voltage of the second semiconductor component using a second signal that is opposite the first signal. An evaluation unit of the circuit arrangement is configured to use first and second current measuring devices to measure first and second gate currents of the first and second semiconductor components, respectively, and to determine in each case, based on the particular varied gate voltages and the respective corresponding gate currents, respective barrier layer temperatures of the two semiconductor component.

    Semiconductor device
    3.
    发明授权

    公开(公告)号:US12046993B2

    公开(公告)日:2024-07-23

    申请号:US18089802

    申请日:2022-12-28

    发明人: Kei Minagawa

    IPC分类号: H02M1/32 H03K17/082 H03K17/08

    摘要: A semiconductor device having a load. The semiconductor device including: an output element configure to connect to the load, the output element being switchable to operate the load; a drive circuit which outputs a drive signal for driving the output element to switch; a detection circuit which compares a state signal, indicative of an operating state of the output element, with a detection threshold, to thereby detect an abnormal level of the operating state; an abnormal level notification circuit which informs an outside of the detected abnormal level; an external terminal configured to receive an external signal for adjusting the detection threshold; and a detection threshold adjustment circuit which adjusts the detection threshold on a basis of the received external signal.

    Post-driver with low voltage operation and electrostatic discharge protection

    公开(公告)号:US11855613B2

    公开(公告)日:2023-12-26

    申请号:US17828581

    申请日:2022-05-31

    发明人: Chin-Hua Wen

    摘要: A post-driver with low voltage operation and electrostatic discharge protection. In one embodiment, a post-driver structure includes a drive unit including a pull-up driver and a pull-down driver, a pad connected to an external resistance, and an output node connected between the pull-up driver and the pull-down driver, the output node configured to connect to a comparator for impedance calibration of the drive unit. The post-driver structure also includes an operational amplifier connected to a first transistor and the pad in a closed loop configuration, the operational amplifier further connected to a second transistor to form a current mirror circuit between the operational amplifier and the drive unit, wherein the current mirror circuit replicates a voltage at the pad with a voltage at the output node for the impedance calibration.

    SHORT CIRCUIT DETECTION AND LIMITING CHANNEL CURRENT IN TRANSISTOR BEFORE TURN OFF IN SHORT CIRCUIT CONDITION

    公开(公告)号:US20230283273A1

    公开(公告)日:2023-09-07

    申请号:US17683804

    申请日:2022-03-01

    IPC分类号: H03K17/08 H02H1/00 H02H9/02

    CPC分类号: H03K17/08 H02H1/0007 H02H9/02

    摘要: A method for driving a power transistor includes comparing a measurement signal that is representative of a load current to a comparator threshold that corresponds to an overcurrent threshold; generating a first fault signal when the measurement signal exceeds the comparator threshold for a first time interval; generating a second fault signal when the measurement signal exceeds the comparator threshold for a second time interval that is greater than the first time interval; regulating a control voltage provided to the control terminal of the transistor to turn off the transistor in response to the second fault signal; and in response to the first fault signal, adjusting the control voltage to an adjusted voltage level in order to limit the load current to a reduced current level that is preconfigured to be greater than the overcurrent threshold. The adjusted voltage level is sufficient to maintain the power transistor in an on-state.

    DEVICE WITH FAULT DETECTION AND RELATED SYSTEM AND METHOD

    公开(公告)号:US20230266403A1

    公开(公告)日:2023-08-24

    申请号:US17678953

    申请日:2022-02-23

    发明人: Gaudenzia BAGNATI

    IPC分类号: G01R31/52 H03K5/24 H03K17/08

    CPC分类号: G01R31/52 H03K5/24 H03K17/08

    摘要: A device includes a driver circuit and diagnostic circuitry coupled to the driver circuit. The diagnostic circuitry includes an on-state diagnostic circuit and an off-state diagnostic circuit. The diagnostic circuitry, in operation: generates a configuration signal associated with an operative condition of the driver circuit based on a comparator output of the off-state diagnostic circuit; diagnoses conditions associated with the driver circuit; and controls operation of the on-state diagnostic circuit based on the configuration signal.