公开(公告)号：US12216601B2

公开(公告)日：2025-02-04

申请号：US17747511

申请日：2022-05-18

Applicant: NORDIC SEMICONDUCTOR ASA

Inventor： Frode Milch Pedersen ,  Markku Vähätaini

IPC: G06F13/362 ,  G06F11/34

Abstract: According to an aspect, there is provided a solution for providing an access to a slave unit. An address from a master unit trying to access a slave unit is received (400). The received address is mapped (402) to a slave address. Default access permissions are associated (404) to the master-slave connection. Additional access permissions associated with the master unit and the slave address are determined (406). The master-slave connection is enabled (408) if additional access permissions allow the master unit to access the slave, otherwise the connection is rejected.

公开(公告)号：US12189556B2

公开(公告)日：2025-01-07

申请号：US18201214

申请日：2023-05-24

Applicant: DENSO CORPORATION

Inventor： Karl Jager ,  Daniel Hill ,  Andrew Driscoll

IPC: G06F13/362 ,  G06F13/42

Abstract: A system and method are provided to enable first and second devices coupled to a SPI bus to operate as master devices on the SPI bus without collisions between the two devices or race conditions with respect to obtaining control over the SPI bus.

公开(公告)号：US12153537B2

公开(公告)日：2024-11-26

申请号：US17856169

申请日：2022-07-01

Applicant: Huawei Technologies Co., Ltd.

Inventor： Chao Li ,  Pengxin Bao ,  Xingxin Zhang ,  Xuehuan Wang

IPC: G06F13/42 ,  G06F13/362 ,  G06F13/40

Abstract: A control method includes, after determining a target device to be controlled, a host sends indication information, a control command, and an address of a register of the target device to a control device through an Inter-Integrated Circuit (I2C) interface, so that the control device encapsulates the indication information, the control command, and the address of the register of the target device, and sends the indication information, the control command, and the address of the register of the target device that are encapsulated to a slave device connected to the control device.

公开(公告)号：US12130761B2

公开(公告)日：2024-10-29

申请号：US18166171

申请日：2023-02-08

Applicant: QUALCOMM Incorporated

Inventor： Christopher Kong Yee Chun ,  John Fletcher ,  Sriharsha Chakka ,  Navdeep Mer ,  Sreenivasan Jouly Jothiram

IPC: G06F13/362 ,  G06F1/26

CPC classification number: G06F13/3625 ,  G06F1/266

Abstract: Systems and methods for bus clock line handover are disclosed. In one aspect, a clock line in a bus is driven continuously during bus handover without having contentious or contradictory drive signals being provided. After arbitration, an original bus master will drive the clock line to a predetermined value until detecting a state change on a data line. An incoming bus master will begin driving the clock line to the predetermined value and then drive a state change on the data line. This state change is the state change detected by the original bus master that causes the original bus master to stop driving the clock line.

公开(公告)号：US12105662B2

公开(公告)日：2024-10-01

申请号：US18373968

申请日：2023-09-28

Applicant: MEDIATEK INC.

Inventor： Ching-Yi Wu

IPC: G06F13/42 ,  G06F1/3234 ,  G06F13/362 ,  G06F13/40

CPC classification number: G06F13/4221 ,  G06F1/3253 ,  G06F13/362 ,  G06F13/4004 ,  G06F2213/0026

Abstract: A chip includes a peripheral component interconnect express (PCIe) switch, a dual-mode device, and a signal transmission control circuit. The PCIe switch includes a first downstream port. The dual-mode device switches between a root complex (RC) mode and an endpoint (EP) mode. The signal transmission control circuit is coupled between the PCIe switch and the dual-mode device. The first downstream port communicates with the dual-mode device operating under the EP mode. The signal transmission control circuit allows an external PCIe device to communicate with the dual-mode device operating under the RC mode.

公开(公告)号：US20240303215A1

公开(公告)日：2024-09-12

申请号：US18547646

申请日：2022-04-06

Applicant: Sony Semiconductor Solutions Corporation

Inventor： Toshihisa Hyakudai ,  Junya Yamada ,  Satoshi Ota

IPC: G06F13/42 ,  G06F13/362

CPC classification number: G06F13/4291 ,  G06F13/362

Abstract: Communication devices, systems and methods are disclosed. In one example, a communication device includes: a communication unit that adds identification information for identifying a data block to a set of data blocks having a serial signal group conforming to SPI transmitted from a master in synchronization with a clock, and transmits the data block to a communication partner device within one frame period of a predetermined communication protocol, or adds identification information for identifying each of the data blocks, and transmits the data block to the communication partner device in a plurality of frame periods; and a storage unit that sequentially stores a number of data blocks transmitted from the master, and then outputs a data block transmitted from the communication partner device in response to the number of data blocks, to transmit the data block to the master.

公开(公告)号：US20240303209A1

公开(公告)日：2024-09-12

申请号：US18665365

申请日：2024-05-15

Applicant: Uniquify, Inc.

Inventor： Jung Lee ,  Venkat Iyer ,  Brett Murdock

IPC: G06F13/362 ,  G06F13/16 ,  G06F13/42 ,  G11C8/18 ,  G11C29/02 ,  H03K5/00 ,  H03K5/133 ,  H03K5/14 ,  H03L7/08 ,  H03L7/081 ,  H03L7/10

CPC classification number: G06F13/3625 ,  G06F13/1689 ,  G06F13/4256 ,  G11C8/18 ,  G11C29/022 ,  G11C29/023 ,  G11C29/028 ,  H03K5/133 ,  H03K5/14 ,  H03L7/08 ,  H03L7/0812 ,  H03L7/10 ,  H03K2005/00019

Abstract: A method for operating a data interface circuit whereby calibration adjustments for data bit capture are made without disturbing normal system operation includes initially establishing, using a first calibration method where a data bit pattern received by the data interface circuit is predictable, an optimal sampling point for sampling data bits received by the data interface circuit, and during a normal system operation and without disturbing the normal system operation, performing a second calibration method where the data bit pattern received by the data interface circuit is unpredictable. The second calibration method determines an amount of a timing drift for received data bit edge transitions and adjusts the optimal timing point determined by the first calibration method to create a revised optimal timing point. The second calibration method samples fringe timing points associated with the transition edges of a data bit.

公开(公告)号：US20240296009A1

公开(公告)日：2024-09-05

申请号：US18178010

申请日：2023-03-03

Applicant: QUALCOMM Incorporated

Inventor： Syed Naseef ,  David Belz

IPC: G06F3/16 ,  G06F13/362

CPC classification number: G06F3/162 ,  G06F13/362

Abstract: Systems and methods for unifying multiple audio bus interfaces in an audio system are disclosed herein. In one aspect, an integrated circuit (IC) comprises a primary slave audio device comprising a first control circuit, and a dependent slave audio device comprising a second control circuit. The primary slave audio device and the dependent slave audio device are communicatively coupled via a slave status link, and the first control circuit and the second control circuit each configured to receive, from a master audio device, a mode instruction that indicates operation in one of a detach mode and a unify mode. The second control circuit is configured to, while operating in the detach mode, transmit a slave status to the master audio device via a second control lane, and, while operating in the unify mode, transmit the slave status to the primary slave audio device via the slave status link.

公开(公告)号：US20240291285A1

公开(公告)日：2024-08-29

申请号：US18565087

申请日：2022-05-31

Applicant: MATRIXED REALITY TECHNOLOGY CO., LTD.

Inventor： Yue Ma

IPC: H02J7/00 ,  G06F13/362 ,  H03L7/08

CPC classification number: H02J7/0013 ,  G06F13/362 ,  H03L7/0807

Abstract: Embodiments of the present disclosure provide a connector. The connector includes first to third interfaces, a switch circuit, a power supply device control circuit, and an interface control circuit. The first to third interfaces are configured to connect a host device, an upstream facing port (UFP) device and a power supply device, respectively. The switch circuit is connected to the first interface, the second interface, the third interface, and the interface control circuit. The power supply device control circuit is connected to the third interface and the interface control circuit. In response to detecting that a power supply device is plugged into the third interface, the power supply device control circuit detects a supply output power of the power supply device and determines a power supply control command based on the supply output power, a required charging power for the host device, and an operating power of the slave device. The interface control circuit performs on-off control on the switch circuit according to the power supply control command, to control power supply from the power supply device to the host device and the slave device. Using the connector, efficient power supply from the external power supply device to the host device and the slave device can be implemented.

公开(公告)号：US20240281403A1

公开(公告)日：2024-08-22

申请号：US18648648

申请日：2024-04-29

Applicant: Intel Corporation

Inventor： Janusz Jurski ,  Enrico David Carrieri ,  Amit Kumar Srivastava ,  Matthew A. Schnoor ,  Myron Loewen

IPC: G06F13/42 ,  G06F9/54 ,  G06F13/24 ,  G06F13/362

CPC classification number: G06F13/4291 ,  G06F9/542 ,  G06F13/24 ,  G06F13/362

Abstract: Embodiments of the present disclosure may relate to apparatus, process, or techniques in a I3C protocol environment that include identifying a pending read notification message by a slave device to be sent to a master device to indicate that the data is available to be read by the master device from a buffer associated with the slave device. The pending read notification may be subsequently transmitted to the master device. Subsequently, until the data in the buffer has been read by the master device, the slave device may wait an identified amount of time that is less than a value of a timeout of the master device, and retransmit the pending read notification message to the master device. Other embodiments may be described and/or claimed.