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18 条记录 (耗时 0.012 秒)

    Conditional latch circuit
    6.
    发明授权
    Conditional latch circuit 失效
    条件闩锁电路

    公开(公告)号：US4019144A

    公开(公告)日：1977-04-19

    申请号：US710940

    申请日：1976-08-02

    申请人： Neil R. Lincoln ,  David R. Resnick

    发明人： Neil R. Lincoln ,  David R. Resnick

    IPC分类号： G06F9/26 ,  H03K19/173 ,  H03K19/04 ,  H03K3/12

    CPC分类号： H03K19/1733 ,  G06F9/264

    摘要： A conditional latch circuit is selectively operable as a latch or as an OR gate. The circuit comprises an OR gate having at least three inputs, each connected to the output of separate ones of three AND gates. A fourth AND gate has an inverted output connected to an input of two AND gates and a non-inverted output connected to an input of the third AND gate. The output of the OR gate is connected to a second input of the third AND gate. With one input of the fourth AND gate connected to a binary clock source, the circuit will operate as a latch to store binary signals received at the second input of the first and second AND gates when the second input of the fourth AND gate is connected to binary one. When the second input of the fourth AND gate is connected to a binary zero, the circuit will operate as an OR circuit.

    摘要翻译： 条件锁存电路可选择性地用作锁存器或OR门。 该电路包括具有至少三个输入的或门，每个输入连接到三个与门中的单独的一个的输出。 第四与门具有连接到两个与门的输入的反相输出和连接到第三与门的输入的非反相输出。 或门的输出连接到第三个与门的第二个输入端。 当第四与门的一个输入连接到二进制时钟源时，当第四与门的第二输入连接到第二与门的第二输入时，该电路将作为锁存器操作以存储在第一和第二与门的第二输入处接收的二进制信号 二进制。 当第四个与门的第二个输入连接到一个二进制零时，该电路将作为OR电路工作。

    Complementary signal generating circuit
    8.
    发明授权
    Complementary signal generating circuit 失效
    互补信号发生电路

    公开(公告)号：US07652506B2

    公开(公告)日：2010-01-26

    申请号：US11723660

    申请日：2007-03-21

    申请人： Mikio Aoki

    发明人： Mikio Aoki

    IPC分类号： H03K19/04

    CPC分类号： H03K5/151 ,  H03K19/094

    摘要： A complementary signal generating circuit according to an embodiment of the present invention includes: an inverting element inverting a first signal to generate a second signal; a first transistor connecting a first power supply potential and a first output terminal electrically in accordance with the first signal; a second transistor connecting the first output terminal and a second power supply potential electrically in accordance with the second signal; a third transistor connecting the first power supply potential and a second output terminal electrically in accordance with the second signal; and a fourth transistor connecting the second output terminal and the second power supply potential electrically in accordance with the first signal.

    摘要翻译： 根据本发明的实施例的互补信号发生电路包括：反相器件，反相第一信号以产生第二信号; 第一晶体管，其根据第一信号电连接第一电源电位和第一输出端子; 第二晶体管，其根据第二信号电连接第一输出端和第二电源电位; 第三晶体管，其根据所述第二信号电连接所述第一电源电位和第二输出端子; 以及第四晶体管，其根据第一信号电连接第二输出端子和第二电源电位。