Communication apparatus which can connect a plurality of communication
lines
    2.
    发明授权
    Communication apparatus which can connect a plurality of communication lines 失效
    能够连接多条通信线路的通信装置

    公开(公告)号:US5719688A

    公开(公告)日:1998-02-17

    申请号:US601971

    申请日:1996-02-15

    Applicant: Naoto Kagami

    Inventor: Naoto Kagami

    Abstract: A communicating apparatus having a plurality of ports to connect a plurality of communication lines comprises a memory to store information indicating whether the plurality of communication lines are extensions of a private branch network or not, a designating circuit to designate whether the communication is to be executed through said extensions or not, and a selector to select one of the plurality of ports in accordance with the result of the designation of the designating circuit and the contents of the memory. The memory stores information indicating whether the communication lines are ISDN lines or PSTN lines. The selector includes a call generating circuit for generating a call in the G4 facsimile mode when the selected communication line is an ISDN line and for generating a call in the G3 facsimile mode when it is decided that the partner is not a G4 facsimile apparatus after completion of the call generation.

    Abstract translation: 具有用于连接多条通信线路的多个端口的通信装置包括:存储器,用于存储指示多个通信线路是否是专用分支网络的扩展的信息;指定电路,用于指定是否执行通信 通过所述扩展或不选择器,以及根据指定电路的指定结果和存储器的内容来选择多个端口之一的选择器。 存储器存储指示通信线路是ISDN线路还是PSTN线路的信息。 选择器包括一个呼叫发生电路,用于当所选择的通信线路是ISDN线路时产生G4传真模式的呼叫,并且在完成之后确定对方不是G4传真设备时,以G3传真模式生成呼叫 的呼叫生成。

    Method and apparatus for high-speed data exchange
    3.
    发明授权
    Method and apparatus for high-speed data exchange 失效
    用于高速数据交换的方法和装置

    公开(公告)号:US5461620A

    公开(公告)日:1995-10-24

    申请号:US97375

    申请日:1993-07-23

    Abstract: A device is provided for rapid data exchange between a telecommunications transmitter (T) and a data processor (PC), and includes a driver (TSV) and an intermediate line (FAST-LINK). The driver (TSV) is arranged between a terminal adapter (ADAPT) of the telecommunications transmitter (T) and an interface of the data processor (PC). The intermediate line (FAST-LINK) is arranged between the driver (TSV) and the data processor (PC). The telecommunications transmitter (T) is connected to a telecommunications network (ISDN) having a signalling channel and a user channel. The telecommunications transmitter (T) has an interface circuit (S) for adjusting transmission parameters between the telecommunications network (ISDN), the telecommunication transmitter (T) and the data processor (PC), has a first layer unit (1) for ensuring that data is transmitted in both directions on the signalling channel and the data channel, has a second layer unit (2) for assigning signalling channel data to the telecommunications transmitter (T) and to the data processor (PC), has a third layer unit (3) for identifying in the telecommunications transmitter (T) all the messages from a signalling activity (Call Reference) to differentiate which devices the user channel data should be assigned, and has an operating part (4) for entering keyboard inputs and a receiver for receiving acoustical inputs and providing acoustical outputs.

    Abstract translation: 提供一种用于在电信发射机(T)和数据处理器(PC)之间进行快速数据交换的设备,并且包括驱动器(TSV)和中间线路(FAST-LINK)。 驱动器(TSV)布置在电信发射机(T)的终端适配器(ADAPT)和数据处理器(PC)的接口之间。 中间线(FAST-LINK)布置在驱动器(TSV)和数据处理器(PC)之间。 电信发射机(T)连接到具有信令信道和用户信道的电信网络(ISDN)。 电信发射机(T)具有用于调整电信网络(ISDN),电信发射机(T)和数据处理器(PC)之间的传输参数的接口电路(S),具有第一层单元(1),用于确保 在信令信道和数据信道上在两个方向上发送数据,具有用于向电信发射机(T)和数据处理器(PC)分配信令信道数据的第二层单元(2)具有第三层单元( 3)用于在电信发射机(T)中识别来自信令活动(呼叫参考)的所有消息以区分应该分配用户信道数据的哪个设备,并且具有用于输入键盘输入的操作部分(4)和用于 接收声学输入并提供声学输出。

    Terminal adapter capable of reducing a memory capacity of a buffer memory
    5.
    发明授权
    Terminal adapter capable of reducing a memory capacity of a buffer memory 失效
    能够减少缓冲存储器的存储容量的终端适配器

    公开(公告)号:US5646959A

    公开(公告)日:1997-07-08

    申请号:US302544

    申请日:1994-09-08

    Abstract: In a terminal adapter which is located between a data terminal equipment unit (11) and a data communication network (12) and which includes a buffer memory (22, 27) for memorizing an original data signal sequence sent from each of the data terminal equipment unit and the data communication network, the original data signal sequence is subjected to data compression by a data compression circuit to be thereafter memorized into the buffer memory and to be read out of the buffer memory as a readout data signal sequence. The readout data signal sequence is expanded by a data expansion circuit (32, 35) to be sent to the data terminal equipment unit or the data communication network at a transmission rate matched therewith. The data compression may be executed by the use of an LZ method, a modified LZ method, such as LZW, LZSS, or the like.

    Abstract translation: 在位于数据终端设备单元(11)和数据通信网络(12)之间的终端适配器中,包括缓冲存储器(22,27),用于存储从每个数据终端设备发送的原始数据信号序列 单元和数据通信网络,原始数据信号序列由数据压缩电路进行数据压缩,然后被存储到缓冲存储器中,并作为读出数据信号序列从缓冲存储器读出。 读出数据信号序列由数据扩展电路(32,35)扩展,以与之对应的传输速率发送到数据终端设备单元或数据通信网络。 可以通过使用LZ方法,LZW,LZSS等的修改的LZ方法来执行数据压缩。

    Adaptor between ISDN basic rate access and switched-56 accesses
    6.
    发明授权
    Adaptor between ISDN basic rate access and switched-56 accesses 失效
    ISDN基本速率接入和交换56接入之间的适配器

    公开(公告)号:US5479405A

    公开(公告)日:1995-12-26

    申请号:US234314

    申请日:1994-04-28

    Abstract: The invention is an adaptor which permits using a digital telephone device with an incompatible telephone network access. In its most preferred embodiment, the present invention is an adaptor which permits an ISDN telephone device to exchange digital data with two Switched-56 Access. An ISDN Basic Rate Access interface circuit interfaces with the ISDN telephone device, while two Switched-56 Access interface circuit interfaces with two Switched-56 Access. The adaptor also includes a clock recovery circuit for synchronizing digital data transfers occurring between the ISDN Basic Rate Access interface circuit and the ISDN telephone device with the digital data transfers occurring between the Switched-56 Access interface circuit and the Switched-56 Access. In an alternative embodiment, the clock recovery circuit synchronizes digital data transfers between the ISDN Basic Rate Access interface circuit and the Switched-56 Access interface circuits rather than conversely as in the preferred embodiments so a Switched-56 telephone device may exchange digital data with an ISDN Basic Rate Access.

    Abstract translation: 本发明是允许使用具有不兼容电话网络访问的数字电话设备的适配器。 在其最优选的实施例中,本发明是一种适配器,其允许ISDN电话设备与两个Switched-56接入交换数字数据。 ISDN基本速率接入接口电路与ISDN电话设备接口,而两个交换机56接入接口电路与两个交换机56接入。 适配器还包括时钟恢复电路,用于将ISDN基本速率访问接口电路和ISDN电话设备之间发生的数字数据传输与在切换56接入电路和切换56接入之间发生的数字数据传输同步。 在替代实施例中,时钟恢复电路在ISDN基本速率访问接口电路和开关56接入电路之间同步数字数据传输,而不是如优选实施例那样相反,因此切换56电话设备可以与 ISDN基本速率访问。

    Digital telephone switch with simultaneous dual PCM format compatibility
    8.
    发明授权
    Digital telephone switch with simultaneous dual PCM format compatibility 失效
    数字电话交换机同时兼容双PCM格式兼容

    公开(公告)号:US5060227A

    公开(公告)日:1991-10-22

    申请号:US385842

    申请日:1989-07-26

    CPC classification number: H04J3/1635 H04Q11/06 H04Q2213/13299 H04Q2213/297

    Abstract: A PCM telephone switch that is simultaneously compatible with both DS-1 and CEPT PCM formats is disclosed. A switch module performs timeslot switching of individual subchannels between DS-1 and CEPT trunks which are input by way of digital group interfaces. Each group interface couples to one or more trunks of serial bit streams of either DS-1 or CEPT format standards. After the input serial bit stream is converted to a parallel format, it is used as eight bits of the address bits of data processing ROMs from which a corresponding 8-bit word is parallel read on a per channel basis and routed to the appropriate output data processing ROMs. The output data bits of the ROMs are the processed data bits which are reconverted to serial format for either DS-1 or CEPT standards as required by the output trunk. A-law or .mu.-law decoding and encoding is accomplished independently from input to output channel on a per channel basis.

    Abstract translation: 公开了同时兼容DS-1和CEPT PCM格式的PCM电话交换机。 交换机模块执行通过数字组接口输入的DS-1和CEPT中继线之间的各个子信道的时隙切换。 每个组接口耦合到DS-1或CEPT格式标准的一个或多个串行比特流中继线。 在将输入串行比特流转换为并行格式之后,将其用作数据处理ROM的地址位的8位,从每个通道开始对应的8位字并行读取,并路由到适当的输出数据 处理ROM。 ROM的输出数据位是被处理的数据位,根据输出中继线的要求,它们被转换为DS-1或CEPT标准的串行格式。 在每个通道的基础上,独立于输入到输出通道实现A律或μ-解码和编码。

    V.110 communication protocol fractional rate adapter for an ISDN network
    10.
    发明授权
    V.110 communication protocol fractional rate adapter for an ISDN network 失效
    用于ISDN网络的V.110通信协议小数速率适配器

    公开(公告)号:US5448560A

    公开(公告)日:1995-09-05

    申请号:US996829

    申请日:1992-12-23

    Abstract: A system and method are disclosed for adapting the rate of a data terminal equipment having a V-series type interface connected to an integrated services digital network which supports more than two simultaneous communications. A V.110 rate adapter is provided which receives user data at a user data rate from the data terminal equipment and outputs a bitstream containing the user data at a B-channel data rate. A fractional rate adapter is also provided which receives this bitstream and outputs a second bitstream at a lower subchannel data rate using a bit discarding technique.

    Abstract translation: 公开了一种用于调整具有连接到支持多于两个同时通信的综合业务数字网络的V系列型接口的数据终端设备的速率的系统和方法。 提供了一种V.110速率适配器,其以数据终端设备的用户数据速率接收用户数据,并以B信道数据速率输出包含用户数据的比特流。 还提供了分数速率适配器,其接收该比特流并且使用位丢弃技术以较低的子信道数据速率输出第二比特流。

Patent Agency Ranking