-
公开(公告)号：US20140073281A1
公开(公告)日：2014-03-13
申请号：US14078462
申请日：2013-11-12
Applicant: QUALCOMM Incorporated
Inventor： Bruce A. Judson , Cong T. Nguyen
IPC: H04B1/10
CPC classification number: H04B1/1036 , H03F3/195 , H03F2200/241 , H03H7/03 , H03H7/1775 , H03H11/52 , H04B1/109
Abstract: A preselect circuit maintains the dynamic range of a received RF input signal during bandpass filtering of the received RF input signal. The preselect circuit includes a Q-deficient passive bandpass filter for coupling to an antenna to receive a received RF input signal. The preselect circuit further includes a Q-enhancement circuit coupled to the Q-deficient passive bandpass filter, wherein the Q-enhancement circuit increases a Q-value of the Q-deficient passive bandpass filter by compensating for resistive inductive losses in the bandpass filter.
Abstract translation: 在接收的RF输入信号的带通滤波期间，预选电路保持接收的RF输入信号的动态范围。 预选电路包括用于耦合到天线以接收接收的RF输入信号的Q缺陷无源带通滤波器。 预选电路还包括耦合到Q缺陷无源带通滤波器的Q增强电路，其中Q增强电路通过补偿带通滤波器中的电阻感应损耗来增加Q缺陷无源带通滤波器的Q值。
-
2.发明申请公开(公告)号：US20180205351A1
公开(公告)日：2018-07-19
申请号：US15916873
申请日：2018-03-09
Applicant: DOCKON AG
Inventor： Patrick Antoine Rada , Forrest James Brown , Alexandre Dupuy
CPC classification number: H03F3/193 , H03F1/38 , H03F1/56 , H03F3/195 , H03F3/72 , H03F2200/129 , H03F2200/147 , H03F2200/222 , H03F2200/237 , H03F2200/241 , H03F2200/243 , H03F2200/246 , H03F2200/261 , H03F2200/294 , H03F2200/297 , H03F2200/301 , H03F2200/306 , H03F2200/309 , H03F2200/387 , H03F2200/391 , H03F2200/399 , H03F2200/402 , H03F2200/438 , H03F2200/451 , H03F2200/462 , H03L7/06 , H04B1/22
Abstract: An amplifying system is provided for use as a high sensitivity receive booster or replacement for a low noise amplifier in a receive chain of a communication device. The amplifying system includes an amplifying circuit configured to receive an input signal having a first frequency and generate an oscillation based on the input signal, a sampling circuit coupled to the amplifying circuit and configured to terminate the oscillation based on a predetermined threshold to periodically clamp and restart the oscillation to generate a series of pulses modulated by the oscillation and by the input signal, and one or more resonant circuits coupled with the amplifying circuit and configured to establish a frequency of operation and to generate an output signal having a second frequency, the second frequency being substantially the same as the first frequency.
-
公开(公告)号：US09712115B2
公开(公告)日：2017-07-18
申请号：US14950295
申请日：2015-11-24
Applicant: QUALCOMM Incorporated
Inventor： Niranjan Talwalkar
CPC classification number: H03F1/0205 , H03F1/0266 , H03F1/565 , H03F3/193 , H03F3/21 , H03F3/245 , H03F3/45179 , H03F3/45475 , H03F2200/06 , H03F2200/09 , H03F2200/102 , H03F2200/15 , H03F2200/165 , H03F2200/181 , H03F2200/216 , H03F2200/222 , H03F2200/225 , H03F2200/228 , H03F2200/241 , H03F2200/42 , H03F2200/451 , H03F2200/471 , H03F2200/61 , H03F2200/91 , H03F2200/99
Abstract: A current-mode power amplifier is disclosed. In some embodiments, the power amplifier may include a first cascode transistor pair including a first transfer function coupled to a second cascode transistor pair including a second transfer function. The first transfer function may be an inverse of the second transfer function. The current-mode power amplifier may also include an inductive-capacitive (LC) resonant circuit to reduce the effects of gate capacitances of the first cascode transistor pair and the second cascode transistor pair. In some embodiments, the current-mode power amplifier may include a bias current controller. The bias current controller may adjust transistor bias currents based, at least in part, on an input signal received by the current-mode power amplifier.
-
公开(公告)号：US07917117B2
公开(公告)日：2011-03-29
申请号：US12020805
申请日：2008-01-28
Applicant: Steven Zafonte , Brian Otis
Inventor： Steven Zafonte , Brian Otis
CPC classification number: H03F1/56 , H03F3/195 , H03F3/45179 , H03F2200/165 , H03F2200/168 , H03F2200/171 , H03F2200/213 , H03F2200/241 , H03F2200/378 , H03F2200/399 , H03F2200/408 , H03F2200/451 , H03F2200/54 , H03F2203/45306 , H03F2203/45318 , H03F2203/45394 , H03J3/20 , H03L7/0805 , H03L7/099
Abstract: This document discloses, among other things, a front end circuit having a selectable center frequency. The center frequency is selected based on a control signal proportional to a phase difference between a reference frequency and an amplifier output. A resonant frequency of a tank circuit coupled to the amplifier is tuned using the control signal.
Abstract translation: 本文件尤其公开了具有可选择的中心频率的前端电路。 基于与参考频率和放大器输出之间的相位差成比例的控制信号来选择中心频率。 使用控制信号调谐耦合到放大器的储能电路的谐振频率。
-
公开(公告)号：US20180342984A1
公开(公告)日：2018-11-29
申请号：US15810764
申请日：2017-11-13
Applicant: Samsung Electro-Mechanics Co., Ltd.
Inventor： Byeong Hak JO , Jeong Hoon KIM , Jong Ok HA
CPC classification number: H03F1/02 , H03F3/189 , H03F3/21 , H03F3/24 , H03F3/45475 , H03F2200/102 , H03F2200/241 , H03F2200/375 , H03F2200/451 , H03F2203/45102
Abstract: An envelope-tracking current bias circuit includes a first rectifying circuit, a second rectifying circuit, and a first arithmetic circuit. The first rectifying circuit is configured to detect an envelope of an input signal, and provide an envelope detection signal comprising a first direct current (DC) offset voltage. The second rectifying circuit is configured to provide a second DC offset voltage corresponding to the first DC offset voltage. The first arithmetic circuit is configured to provide an envelope signal in which the first DC offset voltage is reduced through subtraction between the envelope detection signal and the second DC offset voltage.
-
Patent Agency Ranking
6.发明申请公开(公告)号：US20180205350A1
公开(公告)日：2018-07-19
申请号：US15916864
申请日：2018-03-09
Applicant: DOCKON AG
Inventor： Patrick Antoine Rada , Forrest James Brown , Alexandre Dupuy
CPC classification number: H03F3/193 , H03F1/38 , H03F1/56 , H03F3/195 , H03F3/72 , H03F2200/129 , H03F2200/147 , H03F2200/222 , H03F2200/237 , H03F2200/241 , H03F2200/243 , H03F2200/246 , H03F2200/261 , H03F2200/294 , H03F2200/297 , H03F2200/301 , H03F2200/306 , H03F2200/309 , H03F2200/387 , H03F2200/391 , H03F2200/399 , H03F2200/402 , H03F2200/438 , H03F2200/451 , H03F2200/462 , H03L7/06 , H04B1/22
Abstract: An amplifying system is provided for use as a high sensitivity receive booster or replacement for a low noise amplifier in a receive chain of a communication device. The amplifying system includes an amplifying circuit configured to receive an input signal having a first frequency and generate an oscillation based on the input signal, a sampling circuit coupled to the amplifying circuit and configured to terminate the oscillation based on a predetermined threshold to periodically clamp and restart the oscillation to generate a series of pulses modulated by the oscillation and by the input signal, and one or more resonant circuits coupled with the amplifying circuit and configured to establish a frequency of operation and to generate an output signal having a second frequency, the second frequency being substantially the same as the first frequency.
-
7.发明申请公开(公告)号：US20180026591A1
公开(公告)日：2018-01-25
申请号：US15723060
申请日：2017-10-02
Applicant: DOCKON AG
Inventor： Patrick Antoine Rada , Forrest James Brown , Alexandre Dupuy
CPC classification number: H03F3/193 , H03F1/38 , H03F1/56 , H03F3/195 , H03F3/72 , H03F2200/129 , H03F2200/147 , H03F2200/222 , H03F2200/237 , H03F2200/241 , H03F2200/243 , H03F2200/246 , H03F2200/261 , H03F2200/294 , H03F2200/297 , H03F2200/301 , H03F2200/306 , H03F2200/309 , H03F2200/387 , H03F2200/391 , H03F2200/399 , H03F2200/402 , H03F2200/438 , H03F2200/451 , H03F2200/462 , H03L7/06 , H04B1/22
Abstract: A logarithmic detector amplifying (LDA) system is provided for use as a high sensitivity receive booster or replacement for a low noise amplifier in a receive chain of a communication device. The LDA system includes an amplifying circuit configured to receive an input signal having a first frequency and generate an oscillation based on the input signal, a sampling circuit coupled to the amplifying circuit and configured to terminate the oscillation based on a predetermined threshold to periodically clamp and restart the oscillation to generate a series of pulses modulated by the oscillation and by the input signal, and one or more resonant circuits coupled with the amplifying circuit and configured to establish a frequency of operation and to generate an output signal having a second frequency, the second frequency being substantially the same as the first frequency.
-
公开(公告)号：US20150070058A1
公开(公告)日：2015-03-12
申请号：US14216945
申请日：2014-03-17
Applicant: DockOn AG
Inventor： Patrick Antoine Rada , Forrest James Brown , Alexandre Dupuy
CPC classification number: H03F3/193 , H03F1/38 , H03F1/56 , H03F3/195 , H03F3/72 , H03F2200/129 , H03F2200/147 , H03F2200/222 , H03F2200/237 , H03F2200/241 , H03F2200/243 , H03F2200/246 , H03F2200/261 , H03F2200/294 , H03F2200/297 , H03F2200/301 , H03F2200/306 , H03F2200/309 , H03F2200/387 , H03F2200/391 , H03F2200/399 , H03F2200/402 , H03F2200/438 , H03F2200/451 , H03F2200/462 , H03L7/06 , H04B1/22
Abstract: A logarithmic detector amplifying (LDA) system is provided for use as a high sensitivity receive booster or replacement for a low noise amplifier in a receive chain of a communication device. The LDA system includes an amplifying circuit configured to receive an input signal having a first frequency and generate an oscillation based on the input signal, a sampling circuit coupled to the amplifying circuit and configured to terminate the oscillation based on a predetermined threshold to periodically clamp and restart the oscillation to generate a series of pulses modulated by the oscillation and by the input signal, and one or more resonant circuits coupled with the amplifying circuit and configured to establish a frequency of operation and to generate an output signal having a second frequency, the second frequency being substantially the same as the first frequency.
-
9.发明授权Logarithmic detector amplifier system for use as high sensitivity selective receiver without frequency conversion 有权对数检波器放大器系统用作高灵敏度选择接收器，无需频率转换公开(公告)号：US09590572B2
公开(公告)日：2017-03-07
申请号：US14216945
申请日：2014-03-17
Applicant: DockOn AG
Inventor： Patrick Antoine Rada , Forrest James Brown , Alexandre Dupuy
CPC classification number: H03F3/193 , H03F1/38 , H03F1/56 , H03F3/195 , H03F3/72 , H03F2200/129 , H03F2200/147 , H03F2200/222 , H03F2200/237 , H03F2200/241 , H03F2200/243 , H03F2200/246 , H03F2200/261 , H03F2200/294 , H03F2200/297 , H03F2200/301 , H03F2200/306 , H03F2200/309 , H03F2200/387 , H03F2200/391 , H03F2200/399 , H03F2200/402 , H03F2200/438 , H03F2200/451 , H03F2200/462 , H03L7/06 , H04B1/22
Abstract: A logarithmic detector amplifying (LDA) system is provided for use as a high sensitivity receive booster or replacement for a low noise amplifier in a receive chain of a communication device. The LDA system includes an amplifying circuit configured to receive an input signal having a first frequency and generate an oscillation based on the input signal, a sampling circuit coupled to the amplifying circuit and configured to terminate the oscillation based on a predetermined threshold to periodically clamp and restart the oscillation to generate a series of pulses modulated by the oscillation and by the input signal, and one or more resonant circuits coupled with the amplifying circuit and configured to establish a frequency of operation and to generate an output signal having a second frequency, the second frequency being substantially the same as the first frequency.
Abstract translation: 提供对数检波器放大（LDA）系统用作高灵敏度接收增强器或替代通信设备的接收链中的低噪声放大器。 LDA系统包括放大电路，其被配置为接收具有第一频率的输入信号并基于输入信号产生振荡;采样电路，耦合到放大电路并且被配置为基于预定阈值终止振荡以周期性地钳位和 重新启动振荡以产生由振荡和输入信号调制的一系列脉冲，以及一个或多个谐振电路，与放大电路耦合并被配置成建立操作频率并产生具有第二频率的输出信号， 第二频率与第一频率基本相同。
-
公开(公告)号：US20160065149A1
公开(公告)日：2016-03-03
申请号：US14888431
申请日：2014-05-02
Inventor： Robert Douglas Shaw
CPC classification number: H03F1/565 , H03F3/45076 , H03F3/45179 , H03F2200/108 , H03F2200/241 , H03F2200/243 , H03F2200/294 , H03F2200/411 , H03F2203/45154 , H03F2203/45394
Abstract: A low noise amplifier circuit including: at least a first input and first output; at least a first stage of transistor amplification having a transistor input terminal; the circuit further comprising: an input driving circuit interconnecting the first input to the transistor input terminal, the input driving circuit including a parallel resonant circuit interconnected between the transistor input terminal and ground and a series resonant circuit interconnected between the input terminal and the transistor input terminal, the input driving circuit functioning as an input matching network for the circuit in conjunction with an input bias and decoupling network.
Abstract translation: 一种低噪声放大器电路，包括：至少第一输入和第一输出; 晶体管放大的至少第一级具有晶体管输入端; 所述电路还包括：输入驱动电路，将所述第一输入端与所述晶体管输入端相连，所述输入驱动电路包括在所述晶体管输入端和地之间互连的并联谐振电路和在所述输入端与所述晶体管输入端之间互连的串联谐振电路 输入驱动电路与输入偏置和去耦网络一起用作电路的输入匹配网络。
-
-
-
-
-
-
-
-
-
Search Results
17
records
(took 0.028 seconds)
