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    System and Method for Decoding Block of Data Received Over Communication Channel
    1.
    发明申请
    System and Method for Decoding Block of Data Received Over Communication Channel 审中-公开
    用于解码通过通信信道接收的数据块的系统和方法

    公开(公告)号：US20160218827A1

    公开(公告)日：2016-07-28

    申请号：US14604871

    申请日：2015-01-26

    申请人： Mitsubishi Electric Research Laboratories, Inc.

    发明人： Kyeong Jin Kim ,  Philip Orlik ,  Toshiaki Koike-Akino

    IPC分类号： H04L1/00 ,  H04B7/04

    CPC分类号： H04L1/0054 ,  H03C3/40 ,  H04B7/0413 ,  H04L25/0246 ,  H04L25/03216 ,  H04L25/03286 ,  H04L25/03891

    摘要： A method decodes a block of data received over a communication channel. The method determines an initial estimate of bits in the block using a QR decomposition (QRD-M) method decoding the bits in the block sequentially by reducing an accumulated distance between the initial estimate and the bits of the block. Then, the method determines the block using a likelihood ascent (LAS) method that iteratively updates the bits of the block starting from the initial estimate.

    摘要翻译： 一种方法对通过通信信道接收的数据块进行解码。 该方法使用QR分解（QRD-M）方法来确定块中比特的初始估计，其通过减少初始估计与块的比特之间的累积距离来顺序地解码块中的比特。 然后，该方法使用从初始估计开始迭代地更新块的比特的似然上升（LAS）方法来确定块。

    Measurement of DC offsets in IQ modulators
    4.
    发明授权
    Measurement of DC offsets in IQ modulators 有权
    IQ调制器中直流偏移的测量

    公开(公告)号：US09025648B2

    公开(公告)日：2015-05-05

    申请号：US13774565

    申请日：2013-02-22

    申请人： Tektronix, Inc.

    发明人： Zoltan Azary

    IPC分类号： H04B3/46 ,  H04B17/00 ,  H03C3/40 ,  H04L27/36

    CPC分类号： H04B17/104 ,  H03C3/40 ,  H04L27/364 ,  H04L27/3854

    摘要： Described are systems and methods of determining DC offset voltages in IQ modulators. First, two different DC test voltages are selected for one of the inputs to the IQ modulator. Then, a first test voltage is applied to one input to the IQ modulator while test data is generated by measuring outputs from a set of signals applied to the other input to the IQ modulator. Then the second test voltage is applied and another set of test data generated. From the first and second sets of test data, second-order polynomial functions may be constructed and compared to one another to yield a ratio of power value outputs. Then the DC offset voltages may be determined from the ratio of power value outputs.

    摘要翻译： 描述了在IQ调制器中确定DC偏移电压的系统和方法。 首先，为IQ调制器的输入之一选择两个不同的直流测试电压。 然后，通过测量从施加到IQ调制器的另一个输入的一组信号的输出来产生测试数据，将第一测试电压施加到IQ调制器的一个输入。 然后施加第二个测试电压，并产生另一组测试数据。 从第一组和第二组测试数据中，可以构造二阶多项式函数并将其相互比较以产生功率值输出的比率。 然后可以根据功率值输出的比率来确定DC偏移电压。

    Semiconductor integrated circuit for communication
    7.
    发明授权
    Semiconductor integrated circuit for communication 有权
    半导体集成电路通讯

    公开(公告)号：US08315579B2

    公开(公告)日：2012-11-20

    申请号：US12917135

    申请日：2010-11-01

    申请人： Ryoji Furuya ,  Kazuhisa Okada ,  Hiroaki Matsui

    发明人： Ryoji Furuya ,  Kazuhisa Okada ,  Hiroaki Matsui

    IPC分类号： H04B1/04 ,  H04B1/00

    CPC分类号： H03D3/007 ,  H03C3/40 ,  H03D7/1433 ,  H04B1/406

    摘要： The present invention provides a semiconductor integrated circuit for communication (RF IC) realizing high yield without deteriorating a carrier leak characteristic even when a modulation circuit is formed by using cheep parts with large variations. In a semiconductor integrated circuit (RF IC) including: an input circuit constructed by a differential amplifier circuit and a level shifter, which is provided on the ante stage of a mixer of a differential circuit called a Gilbert Cell; and a modulation circuit that performs modulation by adding an I/Q signal and a carrier wave signal, a calibration circuit for canceling a DC offset in an output of the input circuit is provided.

    摘要翻译： 本发明提供了一种用于通信（RF IC）的半导体集成电路，即使在通过使用具有大变化的尖峰部分形成调制电路时，也能实现高产率而不劣化载波泄漏特性。 一种半导体集成电路（RF IC），包括：由差分放大电路和电平移位器构成的输入电路，其设置在称为吉尔伯特细胞的差分电路的混频器的前端; 以及通过添加I / Q信号和载波信号来执行调制的调制电路，提供了用于消除输入电路的输出中的DC偏移的校准电路。

    Complex envelope elimination and restoration transmitter
    8.
    发明授权
    Complex envelope elimination and restoration transmitter 有权
    复信封消除和恢复发射机

    公开(公告)号：US08300728B1

    公开(公告)日：2012-10-30

    申请号：US12284726

    申请日：2008-09-24

    申请人： Theodore J. Hoffmann ,  David W. Cripe

    发明人： Theodore J. Hoffmann ,  David W. Cripe

    IPC分类号： H03C3/00

    CPC分类号： H03C3/40 ,  H03C5/00 ,  H03C2200/0058

    摘要： The invention is a method of transmitting a radio signal using a complex envelope elimination and restoration technique. The method includes receiving a radio frequency (RF) signal. Further, the method includes separating the RF signal into an in-phase baseband signal (I) and a quadrature baseband signal (Q). Still further, the method includes decomposing the (I) signal into a in-phase magnitude component and a in-phase phase component while decomposing the Q signal into a quadrature magnitude component and a quadrature phase component. Alternatively, the source signal could be digital baseband information. Digital signal processing could generate the phase and magnitude reference signals for the system.

    摘要翻译： 本发明是一种使用复信封消除和恢复技术发送无线电信号的方法。 该方法包括接收射频（RF）信号。 此外，该方法包括将RF信号分离为同相基带信号（I）和正交基带信号（Q）。 此外，该方法包括将（I）信号分解为同相幅度分量和同相相位分量，同时将Q信号分解成正交幅度分量和正交相位分量。 或者，源信号可以是数字基带信息。 数字信号处理可以产生系统的相位和幅度参考信号。

    Highly Optimized Digital IQ Transmitter Chain
    9.
    发明申请
    Highly Optimized Digital IQ Transmitter Chain 有权
    高度优化的数字IQ发射机链

    公开(公告)号：US20120263260A1

    公开(公告)日：2012-10-18

    申请号：US13535827

    申请日：2012-06-28

    申请人： Stefan van Waasen

    发明人： Stefan van Waasen

    IPC分类号： H04L27/06 ,  H03M1/66

    CPC分类号： H03C5/00 ,  H03C1/36 ,  H03C3/40 ,  H03D7/1441 ,  H03D7/165 ,  H03D2200/0052

    摘要： Circuitry separates a modulation signal into digital sign and magnitude signal components. The digital magnitude signal is converted to an analog magnitude signal. The analog magnitude signal is the mixed with an in-phase or quadrature carrier signal under the influence of the digital sign signal and routed to a driver output stage.

    摘要翻译： 电路将调制信号分离成数字符号和幅度信号分量。 数字幅度信号被转换成模拟量值信号。 模拟幅度信号在数字信号的影响下与同相或正交载波信号混合，并被路由到驱动器输出级。

    FEEDBACK COMPENSATION DETECTOR FOR A DIRECT CONVERSION TRANSMITTER
    10.
    发明申请
    FEEDBACK COMPENSATION DETECTOR FOR A DIRECT CONVERSION TRANSMITTER 有权
    用于直接转换发射机的反馈补偿检测器

    公开(公告)号：US20120253736A1

    公开(公告)日：2012-10-04

    申请号：US13491945

    申请日：2012-06-08

    申请人： Jorgen S. Nielsen

    发明人： Jorgen S. Nielsen

    IPC分类号： G06F15/00

    CPC分类号： H03C3/40 ,  H04B1/0475 ,  H04B1/30

    摘要： A feedback compensation detector for a direct conversion transmitter includes a baseband processor, a direct up-converter, an antenna, and an impairment detection and compensation feedback circuit. The baseband processor generates an in-phase (I) baseband signal and a quadrature-phase (Q) baseband signal. The direct up-converter is coupled to the baseband processor, and combines the I and Q baseband signals with an RF carrier signal to generate an RF output signal. The antenna is coupled to the direct up-converter, and transmits the RF output signal. The impairment detection and compensation feedback circuit is coupled to the RF output signal and the I and Q baseband signals. The impairment detection and compensation feedback circuit down-converts the RF output signal to generate an intermediate frequency (IF) signal, measures as least one signal impairment in the IF signal, and pre-distorts the I and Q baseband signals to compensate for the measured signal impairment.

    摘要翻译： 用于直接转换发射机的反馈补偿检测器包括基带处理器，直接上变频器，天线以及损伤检测和补偿反馈电路。 基带处理器产生同相（I）基带信号和正交相位（Q）基带信号。 直接上变频器耦合到基带处理器，并且将I和Q基带信号与RF载波信号组合以产生RF输出信号。 天线耦合到直接上变频器，并发射RF输出信号。 损伤检测和补偿反馈电路耦合到RF输出信号和I和Q基带信号。 损伤检测和补偿反馈电路对RF输出信号进行降频转换以产生中频（IF）信号，测量IF信号中的至少一个信号损害，并且预失真I和Q基带信号以补偿所测量的 信号障碍。