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公开(公告)号：US09946613B2
公开(公告)日：2018-04-17
申请号：US14593220
申请日：2015-01-09
Applicant: YOKOGAWA ELECTRIC CORPORATION
Inventor： Masahisa Goto , Tatsuzou Sakuramoto , Koji Nagatomi , Hiroaki Higuchi , Ryuichiro Hoshina
IPC: G06F11/00 , G06F11/20 , G05B19/414 , G05B19/05
CPC classification number: G06F11/2007 , G05B19/054 , G05B19/414 , G05B2219/14125 , G05B2219/14128 , G06F11/2017
Abstract: An instrumentation system according to one embodiment of the present invention includes a plurality of field devices, in which each of the field devices is configured to perform at least one of measuring and operation of a target, a connection device including a plurality of slots, in which I/O modules are respectively attachable to the slots and the field devices are connectable to the I/O module, and a host control device configured to individually set the I/O modules attached to the slots to have a redundant configuration or a non-redundant configuration and to operate a first I/O module having the non-redundant configuration, among the I/O modules attached to the slots, in a pseudo redundant configuration.
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公开(公告)号：US09940209B2
公开(公告)日：2018-04-10
申请号：US15002520
申请日：2016-01-21
Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
Inventor： Hao He , Ling Sun , Jun Wei Zhang
CPC classification number: G06F11/2007 , G06F11/2017 , G06F11/2028 , G06F11/2038 , G06F11/2046 , G06F11/2089 , G06F11/2094 , G06F2201/85 , H04L41/0668 , H04L41/0816 , H04L67/1002 , H04L67/1097 , H04L69/40
Abstract: An SVC cluster manages a plurality of storage devices and includes a plurality of SVCs interconnected via a network, each SVC acting as a separate node. A new configuration node is activated in response to configuration node failures. The new configuration node retrieves client subscription information about events occurring in storage devices managed by the SVC cluster from the storage devices. In response to events occurring in the storage device managed by the SVC cluster, the new configuration node obtains storage device event information from a storage device event monitoring unit. The new configuration node sends storage device events to clients who have subscribed to this information according to subscription information obtained. The storage device is not installed in the original configuration node.
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公开(公告)号：US20180074923A1
公开(公告)日：2018-03-15
申请号：US15817226
申请日：2017-11-19
Applicant: International Business Machines Corporation
Inventor： Jesse P. Arroyo , Christopher J. Engel , Kaveh Naderi , James E. Smith
CPC classification number: G06F11/1616 , G06F11/2005 , G06F11/2007 , G06F11/2017 , G06F13/4068 , G06F13/4282 , G06F2201/805 , G06F2201/85 , G06F2213/0026
Abstract: A method, system and computer program product are provided for implementing cable failover in multiple cable Peripheral Component Interconnect Express (PCIE) IO interconnections to an external IO enclosure. System firmware is provided for implementing health check functions for the PCIE IO interconnections to identify a faulted low byte cable. A cable failover mechanism recovers a PCI link to the external IO enclosure. A multiplexer logic is provided between the PCIE host bridge (PHB) and the cable connected to the IO enclosure to perform a full lane reversal of the PCIE lanes.
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公开(公告)号：US20170351578A1
公开(公告)日：2017-12-07
申请号：US15173396
申请日：2016-06-03
Applicant: Hewlett Packard Enterprise Development LP
Inventor： Andrew C Cartes , Stewart Gavin Goodson , Rameez Kadar Kazi , Adam Ruiz , Doug Hascall
CPC classification number: G06F1/206 , G06F1/24 , G06F11/004 , G06F11/1435 , G06F11/2017
Abstract: Example implementations relate to sequential resets of redundant subsystems. For example, in an implementation, a controller may receive a maintenance activity instruction and may perform the maintenance activity on the redundant subsystems. After performance of the redundant subsystems, the controller may sequentially reset each of the redundant subsystems. The controller may wait a random delay between sequential resets of the redundant subsystems.
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公开(公告)号：US09798636B2
公开(公告)日：2017-10-24
申请号：US14747450
申请日：2015-06-23
Applicant: Liqid Inc.
Inventor： Jason Breakstone , Christopher R. Long , James Scott Cannata
CPC classification number: G06F11/2053 , G06F11/2007 , G06F11/2012 , G06F11/2017 , G06F11/2069 , G06F13/4022 , G06F13/4068 , G06F13/4234 , G06F13/4282 , G06F2201/85 , H04L67/1097 , H04L69/40
Abstract: Systems, methods, apparatuses, and software for data storage systems are provided herein. In one example, a data storage system is provided that includes storage drives each comprising a PCIe interface, and configured to store data and retrieve the data stored on associated storage media responsive to data transactions received over a switched PCIe fabric. The data storage system includes processors configured to each manage only an associated subset of the storage drives over the switched PCIe fabric. A first processor is configured to identify first data packets received over a network interface associated with the first processor within a network buffer of the first processor as comprising a storage operation associated with at least one of the plurality of storage drives managed by a second processor, and responsively transfer the first data packets into a network buffer of the second processor.
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Patent Agency Ranking
公开(公告)号：US20170277914A1
公开(公告)日：2017-09-28
申请号：US15506967
申请日：2014-11-12
Applicant: Hitachi, Ltd.
Inventor： Akihiko ARAKI , Yusuke NONAKA , Masanori TAKADA , Naoya OKADA
CPC classification number: G06F3/064 , G06F3/0634 , G06F3/0635 , G06F11/20 , G06F11/2007 , G06F11/2017
Abstract: When mounting hardware which is coupled to another portion by a plurality of paths with different applications, despite the hardware being a single device, and a failure occurs in any of the paths, there is a risk that the failure may propagate to other components unless the other paths are also blocked. In order to solve the problem described above, in a storage apparatus to which a device coupled by a plurality of coupling paths with different applications can be mounted, the present invention determines a block range at the time of an occurrence of a failure to be a device and a plurality of coupling paths coupled to the device, manages the block range, and upon an occurrence of a failure, executes failure handling which involves blocking an appropriate block range determined in advance by referring to the information.
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公开(公告)号：US20170116093A1
公开(公告)日：2017-04-27
申请号：US14924617
申请日：2015-10-27
Applicant: International Business Machines Corporation
Inventor： Jesse P. Arroyo , Christopher J. Engel , Kaveh Naderi , James E. Smith
CPC classification number: G06F11/1616 , G06F11/2005 , G06F11/2007 , G06F11/2017 , G06F13/4068 , G06F13/4282 , G06F2201/805 , G06F2201/85 , G06F2213/0026
Abstract: A method, system and computer program product are provided for implementing cable failover in multiple cable Peripheral Component Interconnect Express (PCIE) IO interconnections to an external IO enclosure. System firmware is provided for implementing health check functions for the PCIE IO interconnections to identify a faulted low byte cable. A cable failover mechanism recovers a PCI link to the external IO enclosure. A multiplexer logic is provided between the PCIE host bridge (PHB) and the cable connected to the IO enclosure to perform a full lane reversal of the PCIE lanes.
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公开(公告)号：US20170103004A1
公开(公告)日：2017-04-13
申请号：US14880257
申请日：2015-10-11
Applicant: International Business Machines Corporation
Inventor： Manish Kumar Chowdhary , Deepak Kodihalli
IPC: G06F11/20
CPC classification number: G06F11/2028 , G06F11/1604 , G06F11/184 , G06F11/2017 , G06F11/2023 , G06F11/2025 , G06F11/2035 , G06F11/2038 , G06F11/3024 , G06F2201/805
Abstract: An approach is provided in which a system selects a first processor as a master Time of Day (TOD) processor in a first TOD topology. The system then assigns a second processor as an alternate master TOD processor to a second TOD topology based upon determining that the second processor is on a different node than the first processor. The system configures to the first TOD topology and, when the system detects a TOD failure requiring a topology switch, the system re-configures to the second TOD topology.
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9.发明授权公开(公告)号：US09507675B2
公开(公告)日：2016-11-29
申请号：US14253770
申请日：2014-04-15
Applicant: QUALCOMM INCORPORATED
Inventor： Dexter Tamio Chun , Yanru Li , Jung Pill Kim , Deepti Vijayalakshmi Sriramagiri
IPC: G06F11/20 , G06F11/10 , G06F11/14 , G06F11/07 , G06F11/08 , G11C29/00 , G11C29/52 , G06F3/06 , G11C29/08
CPC classification number: G06F11/2017 , G06F3/0688 , G06F11/0772 , G06F11/08 , G06F11/1008 , G06F11/1016 , G06F11/1048 , G06F11/1417 , G06F2201/85 , G06F2212/1032 , G06F2212/7201 , G11C29/00 , G11C29/08 , G11C29/52 , G11C29/70
Abstract: Systems, methods, and computer programs are disclosed for recovering from dynamic random access memory (DRAM) defects. One method comprises determining that an uncorrected bit error has occurred for a physical codeword address associated with a dynamic random access memory (DRAM) device coupled to a system on chip (SoC). A kernel page associated with a DRAM page comprising the physical codeword address is identified as a bad page. Recovery from the uncorrected bit error is provided by rebooting a system comprising the SoC and the DRAM device. In response to the rebooting, the identified kernel page is excluded from being allocated for DRAM operation.
Abstract translation: 公开了用于从动态随机存取存储器（DRAM）缺陷中恢复的系统，方法和计算机程序。 一种方法包括确定与耦合到片上系统（SoC）的动态随机存取存储器（DRAM）设备相关联的物理码字地址已经发生未校正的位错误。 与包括物理码字地址的DRAM页面相关联的内核页面被识别为坏页面。 通过重新启动包括SoC和DRAM设备的系统来提供从未校正的位错误的恢复。 响应于重新启动，识别的内核页面被排除在为DRAM操作分配之前。
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公开(公告)号：US09501373B2
公开(公告)日：2016-11-22
申请号：US14631329
申请日：2015-02-25
Applicant: SK hynix Inc.
Inventor： Eu Joon Byun
CPC classification number: G06F11/2017 , G06F11/073 , G06F11/0793 , G06F12/0238 , G06F2212/1016 , G06F2212/1044 , G06F2212/657 , G06F2212/7201 , G06F2212/7204 , G06F2212/7208 , G11C29/70 , G11C2029/0409
Abstract: A data storage device includes memory devices including respective main regions and respective virtual regions, and a processor suitable for forming a super page by selecting main pages from the respective main regions, wherein when a main page of a main region in a memory device is a bad region, the processor forms a virtual super page by selecting a virtual page from a virtual region in the memory device instead of the main page.
Abstract translation: 一种数据存储装置，包括各自的主区域和各自的虚拟区域的存储装置，以及适于通过从各个主要区域选择主页形成超级页面的处理器，其中当存储装置中的主要区域的主页是 处理器通过从存储设备中的虚拟区域而不是主页面中选择虚拟页面来形成虚拟超级页面。
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